Stack frame header size in bytes.

The stack frame header is made of the values that are always saved (regardless of the context.) It consists of the saved return address and a pointer to the previous frame. Thus, its size is two stack frame slots which equals two addresses/words (2 * 8 byte).

All registers are 8 byte wide.

The number of bytes that the stack pointer should be aligned to.

The number of spill slots available without allocating more.

Convert a spill slot number to a *byte* offset, with no sign.

0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | 27 | 28 | 29 | 30 | 31 | | 32 | 33 | 34 | 35 | 36 | 37 | 38 | 39 | 40 | 41 | 42 | 42 | 44 | 45 | 46 | 47 | 48 | 49 | 50 | 51 | 52 | 53 | 54 | 55 | 56 | 57 | 58 | 59 | 60 | 61 | 62 | 63 | |== General Purpose registers ==================================================================================================================================| | ZR | RA | SP | GP | TP | tmp r. - | FP | | <---- argument passing ------------- | -- callee saved ------------------------------> | tmp regs -- | | -- | -- | -- | -- | -- | free r. | -- | BR | free registers --------------- | SP | HP | R1 | R2 | R3 | R4 | R5 | R6 | R7 | SL | free regs -- | |== SIMD/FP Registers ==========================================================================================================================================| | temporary registers ----------- | | <---- argument passing ------------- | -- callee saved ------------------------------> | tmp regs -- | | free registers --------- | F1 | F2 | free registers --------------- | F3 | F4 | F5 | F6 | D1 | D2 | D3 | D4 | D5 | D6 | -- | -- | -- | -- | '---------------------------------------------------------------------------------------------------------------------------------------------------------------' ZR: Zero, RA: Return Address, SP: Stack Pointer, GP: Global Pointer, TP: Thread Pointer, FP: Frame Pointer BR: Base, SL: SpLim

Apply a given mapping to all the register references in this instruction.

Checks whether this instruction is a jump/branch instruction.

One that can change the flow of control in a way that the register allocator needs to worry about.

Get the BlockIds of the jump destinations (if any)

Change the destination of this (potential) jump instruction.

Used in the linear allocator when adding fixup blocks for join points.

An instruction to spill a register into a spill slot.

See if this instruction is telling us the current C stack delta

Not real instructions. Just meta data

Copy the value in a register to another one.

Must work for all register classes.

Take the source and destination from this (potential) reg -> reg move instruction

We have to be a bit careful here: A MOV can also mean an implicit conversion. This case is filtered out.

Make an unconditional jump instruction.

Decrement sp to allocate stack space.

The stack grows downwards, so we decrement the stack pointer by n (bytes). This is dual to mkStackDeallocInstr. sp is the RISCV stack pointer, not to be confused with the STG stack pointer.

Increment SP to deallocate stack space.

The stack grows downwards, so we increment the stack pointer by n (bytes). This is dual to mkStackAllocInstr. sp is the RISCV stack pointer, not to be confused with the STG stack pointer.

Making far branches