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3.5.4
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limbo
parsers
verilog
bison
VerilogDriver.h
Go to the documentation of this file.
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#ifndef VERILOGPARSER_DRIVER_H
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#define VERILOGPARSER_DRIVER_H
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#include "
VerilogDataBase.h
"
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namespace
VerilogParser
{
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using
std::cout;
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using
std::endl;
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using
std::cerr;
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using
std::string;
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using
std::vector;
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using
std::pair;
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using
std::make_pair;
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using
std::ostringstream;
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class
Driver
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{
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public
:
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Driver
(
VerilogDataBase
& db);
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bool
trace_scanning
;
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bool
trace_parsing
;
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string
streamname
;
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bool
parse_stream
(std::istream& in,
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const
string
& sname =
"stream input"
);
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bool
parse_string
(
const
string
& input,
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const
string
& sname =
"string stream"
);
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bool
parse_file
(
const
string
& filename);
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// To demonstrate pure handling of parse errors, instead of
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// simply dumping them on the standard error output, we will pass
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// them to the driver using the following two member functions.
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void
error
(
const
class
location& l,
const
string
& m);
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void
error
(
const
string
& m);
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class
Scanner*
lexer
;
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VerilogDataBase
&
m_db
;
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void
module_name_cbk(std::string
const
&, std::vector<GeneralName>
const
&);
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void
module_name_cbk(std::string
const
&, std::vector<GeneralName>
const
&, std::vector<GeneralName>
const
&);
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void
wire_pin_cbk(std::string&, std::string&,
Range
const
& =
Range
());
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void
wire_pin_cbk(
int
,
int
, std::string&);
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void
wire_pin_cbk(std::vector<GeneralName>&, std::string&);
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void
wire_declare_cbk(std::vector<GeneralName>
const
&,
Range
const
&);
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void
wire_declare_cbk(std::vector<GeneralName>
const
& vNetName);
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void
pin_declare_cbk(std::vector<GeneralName>
const
&,
unsigned
,
Range
const
&);
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void
pin_declare_cbk(std::vector<GeneralName>
const
&,
unsigned
);
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void
module_instance_cbk(std::string
const
&, std::string
const
&);
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void
assignment_cbk(std::string
const
&,
Range
const
&, std::string
const
&,
Range
const
&);
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protected
:
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vector<NetPin>
m_vNetPin
;
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};
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bool
read
(
VerilogDataBase
& db,
const
string
& verilogFile);
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}
// namespace example
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#endif
// EXAMPLE_DRIVER_H
VerilogDataBase.h
Database for Verilog parser.
VerilogParser::Driver::m_db
VerilogDataBase & m_db
Definition
VerilogDriver.h:92
VerilogParser::Driver::trace_scanning
bool trace_scanning
enable debug output in the flex scanner
Definition
VerilogDriver.h:43
VerilogParser::Driver::streamname
string streamname
stream name (file or input stream) used for error messages.
Definition
VerilogDriver.h:49
VerilogParser::Driver::parse_file
bool parse_file(const string &filename)
VerilogParser::Driver::Driver
Driver(VerilogDataBase &db)
VerilogParser::Driver::lexer
class Scanner * lexer
Definition
VerilogDriver.h:88
VerilogParser::Driver::m_vNetPin
vector< NetPin > m_vNetPin
Use as a stack for node and pin pairs in a net, because wire_pin_cbk will be called before module_i...
Definition
VerilogDriver.h:111
VerilogParser::Driver::error
void error(const string &m)
VerilogParser::Driver::trace_parsing
bool trace_parsing
enable debug output in the bison parser
Definition
VerilogDriver.h:46
VerilogParser::Driver::parse_string
bool parse_string(const string &input, const string &sname="string stream")
VerilogParser::Driver::parse_stream
bool parse_stream(std::istream &in, const string &sname="stream input")
VerilogParser::Driver::error
void error(const class location &l, const string &m)
VerilogParser::VerilogDataBase
Base class for verilog database. Only pure virtual functions are defined. User needs to inheritate ...
Definition
VerilogDataBase.h:212
VerilogParser::vector
VerilogParser
namespace for VerilogParser
Definition
VerilogDataBase.h:20
VerilogParser::read
bool read(VerilogDataBase &db, const string &verilogFile)
API for VerilogParser. Read Verilog file and initialize database by calling user-defined callback fun...
VerilogParser::Range
range with pair of low and high values
Definition
VerilogDataBase.h:32
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