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jDisplayPort3$okayYcdefaultggports port@0—endpoint_g port@1—endpointÙ {`�= î»AÝvâÌ1_g!opp-table2operating-points-v2gopp-1600000001 ‰h8/opp-2700000001߀80opp-5400000001 /¿8ìopp-81000000010Gž€8Ãaux-buspanel&2samsung,atna40yk20samsung,atna33xc20 Œ ™Y cdefaultghportendpoint_!gphy@aec2a002qcom,x1e80100-dp-phy@— ì*œ ì"ì ì&ì ì Èo"" +auxcfg_ahbrefº;Z, $disabledgiphy@aec5a002qcom,x1e80100-dp-phy@— ìZœ ìRì ìVì ìPÈo-" +auxcfg_ahbrefº;Z,$okay¹¯ɰgclock-controller@af000002qcom,x1e80100-dispcc— ðdo2"=%38899::º;8/ZÛ¥ginterrupt-controller@b2200002qcom,x1e80100-pdcqcom,pdc — "@ðdH ¦à**û/ 4ca ƒÍ �0¿ªg®power-management@c300000%2qcom,x1e80100-aoss-qmpqcom,aoss-qmp— 01F1 �1ZgÓsram@c3f00002qcom,rpmh-stats— ?arbiter@c4000002qcom,x1e80100-spmi-pmic-arb0— @0 P@ Däcorechnlsobsrvrê ¶ ûgjspmi@c42d000 — BÐ@ L äcnfgintr Speriph_irq F®ª¿ gkpmic@02qcom,pm8550qcom,spmi-pmic— glpon@13002qcom,pmk8350-pon— ählospbsgmpwrkey2qcom,pmk8350-pwrkeyÝ Ãtgnresin2qcom,pmk8350-resinÝ $disabledgortc@61002qcom,pmk8350-rtc—ab ärtcalarmÝb Î Ügpnvram@71002qcom,spmi-sdam—q  ûqgqreboot-reason@48—H ïgrnvram@7e002qcom,spmi-sdam—~  û~gscharge-limit-en@73—sgtcharge-limit-end@75—ugucharge-limit-delta@76—vgvgpio@8800!2qcom,pmk8550-gpioqcom,spmi-gpio—¸ø # ª¿g#pwm2qcom,pmk8550-pwm ô $disabledgwpmic@12qcom,pm8550qcom,spmi-pmic— gxtemp-alarm@a002qcom,spmi-temp-alarm— Ý qg²gpio@8800 2qcom,pm8550-gpioqcom,spmi-gpio—ˆø Ž  ª¿gŽrtmr0-reset-n-active-state gpio10 %normal ÿ G  g�usb0-3p3-reg-en-state gpio11 %normal ÿ G  gÑled-controller@ee00*2qcom,pm8550-flash-ledqcom,spmi-flash-led—î $disabledgypwm!2qcom,pm8550-pwmqcom,pm8350c-pwm ô $disabledgzpmic@22qcom,pm8550qcom,spmi-pmic— g{temp-alarm@a002qcom,spmi-temp-alarm— Ý qg³gpio@8800"2qcom,pm8550ve-gpioqcom,spmi-gpio—ˆø $ ª¿g$pmic@32qcom,pmc8380qcom,spmi-pmic— g|temp-alarm@a002qcom,spmi-temp-alarm— Ý qg´gpio@8800!2qcom,pmc8380-gpioqcom,spmi-gpio—ˆø   ª¿gedp-bl-en-state gpio4 %normal ÿ  g pmic@42qcom,pmc8380qcom,spmi-pmic— g}temp-alarm@a002qcom,spmi-temp-alarm— Ý qgµgpio@8800!2qcom,pmc8380-gpioqcom,spmi-gpio—ˆø %  ª¿g%pmic@52qcom,pmc8380qcom,spmi-pmic— g~temp-alarm@a002qcom,spmi-temp-alarm— Ý qg¶gpio@8800!2qcom,pmc8380-gpioqcom,spmi-gpio—ˆø &  ª¿g&usb0-pwr-1p15-reg-en-state gpio8 %normal ÿ G  gÏpmic@62qcom,pmc8380qcom,spmi-pmic— gtemp-alarm@a002qcom,spmi-temp-alarm— Ý qg·gpio@8800!2qcom,pmc8380-gpioqcom,spmi-gpio—ˆø '  ª¿g'pmic@82qcom,pm8550qcom,spmi-pmic— g€temp-alarm@a002qcom,spmi-temp-alarm— Ý qg¸gpio@8800"2qcom,pm8550ve-gpioqcom,spmi-gpio—ˆø ( ª¿g(misc-3p3-reg-en-state gpio6 %normal G (   ÿ 8gÍpmic@92qcom,pm8550qcom,spmi-pmic—  g�temp-alarm@a002qcom,spmi-temp-alarm— Ý qg¹gpio@8800"2qcom,pm8550ve-gpioqcom,spmi-gpio—ˆø ) ª¿g)usb0-1p8-reg-en-state gpio8 %normal ÿ G  gÐpmic@c2qcom,pm8010qcom,spmi-pmic—   $disabledg‚temp-alarm@24002qcom,spmi-temp-alarm—$Ý $qgºspmi@c432000 — C @ M äcnfgintr Speriph_irq F®ª¿ gƒpmic@72qcom,smb2360qcom,spmi-pmic— $okayg„phy@fd002qcom,smb2360-eusb2-repeater—ý, L* Y+g±pmic@a2qcom,smb2360qcom,spmi-pmic—  $okayg…phy@fd002qcom,smb2360-eusb2-repeater—ý, L* Y,g¶pmic@b2qcom,smb2360qcom,spmi-pmic—   $disabledg†phy@fd002qcom,smb2360-eusb2-repeater—ý,g‡pmic@c2qcom,smb2360qcom,spmi-pmic—   $disabledgˆphy@fd002qcom,smb2360-eusb2-repeater—ý,g‰pinctrl@f1000002qcom,x1e80100-tlmm—ð ÝÐø ª¿ `ï e® s",Hîg`edp0-hpd-default-state gpio119 %edp0_hot Ggqup-i2c0-data-clk-state gpio0gpio1 %qup0_se0 . ˆ˜g}qup-i2c1-data-clk-state gpio4gpio5 %qup0_se1 . ˆ˜gƒqup-i2c2-data-clk-state gpio8gpio9 %qup0_se2 . ˆ˜g†qup-i2c3-data-clk-state gpio12gpio13 %qup0_se3 . ˆ˜gŠqup-i2c4-data-clk-state gpio16gpio17 %qup0_se4 . ˆ˜g•qup-i2c5-data-clk-state gpio20gpio21 %qup0_se5 . ˆ˜g˜qup-i2c6-data-clk-state gpio24gpio25 %qup0_se6 . ˆ˜g qup-i2c7-data-clk-state gpio14gpio15 %qup0_se7 . ˆ˜g¤qup-i2c8-data-clk-state gpio32gpio33 %qup1_se0 . ˆ˜g_qup-i2c9-data-clk-state gpio36gpio37 %qup1_se1 . ˆ˜gfqup-i2c10-data-clk-state gpio40gpio41 %qup1_se2 . ˆ˜giqup-i2c11-data-clk-state gpio44gpio45 %qup1_se3 . ˆ˜glqup-i2c12-data-clk-state gpio48gpio49 %qup1_se4 . ˆ˜goqup-i2c13-data-clk-state gpio52gpio53 %qup1_se5 . ˆ˜grqup-i2c14-data-clk-state gpio56gpio57 %qup1_se6 . ˆ˜guqup-i2c15-data-clk-state gpio54gpio55 %qup1_se7 . ˆ˜gyqup-i2c16-data-clk-state gpio64gpio65 %qup2_se0 . ˆ˜gBqup-i2c17-data-clk-state gpio68gpio69 %qup2_se1 . ˆ˜gFqup-i2c18-data-clk-state gpio72gpio73 %qup2_se2 . ˆ˜gIqup-i2c19-data-clk-state gpio76gpio77 %qup2_se3 . ˆ˜gMqup-i2c20-data-clk-state gpio80gpio81 %qup2_se4 . ˆ˜gPqup-i2c21-data-clk-state gpio84gpio85 %qup2_se5 . ˆ˜gSqup-i2c22-data-clk-state gpio88gpio89 %qup2_se6 . ˆ˜gWqup-i2c23-data-clk-state gpio86gpio87 %qup2_se7 . ˆ˜gZqup-spi0-cs-state gpio3 %qup0_se0 . Gg‚qup-spi0-data-clk-state gpio0gpio1gpio2 %qup0_se0 . Gg�qup-spi1-cs-state gpio7 %qup0_se1 . Gg…qup-spi1-data-clk-state gpio4gpio5gpio6 %qup0_se1 . Gg„qup-spi2-cs-state gpio11 %qup0_se2 . Gg‰qup-spi2-data-clk-state gpio8gpio9gpio10 %qup0_se2 . Ggˆqup-spi3-cs-state gpio15 %qup0_se3 . Gg”qup-spi3-data-clk-state gpio12gpio13gpio14 %qup0_se3 . Gg“qup-spi4-cs-state gpio19 %qup0_se4 . Gg—qup-spi4-data-clk-state gpio16gpio17gpio18 %qup0_se4 . Gg–qup-spi5-cs-state gpio23 %qup0_se5 . GgŸqup-spi5-data-clk-state gpio20gpio21gpio22 %qup0_se5 . Ggžqup-spi6-cs-state gpio27 %qup0_se6 . Gg£qup-spi6-data-clk-state gpio24gpio25gpio26 %qup0_se6 . Gg¢qup-spi7-cs-state gpio13 %qup0_se7 . Gg­qup-spi7-data-clk-state gpio14gpio15gpio12 %qup0_se7 . Gg¬qup-spi8-cs-state gpio35 %qup1_se0 . Ggequp-spi8-data-clk-state gpio32gpio33gpio34 %qup1_se0 . Ggdqup-spi9-cs-state gpio39 %qup1_se1 . Gghqup-spi9-data-clk-state gpio36gpio37gpio38 %qup1_se1 . Gggqup-spi10-cs-state gpio43 %qup1_se2 . Ggkqup-spi10-data-clk-state gpio40gpio41gpio42 %qup1_se2 . Ggjqup-spi11-cs-state gpio47 %qup1_se3 . Ggnqup-spi11-data-clk-state gpio44gpio45gpio46 %qup1_se3 . Ggmqup-spi12-cs-state gpio51 %qup1_se4 . Ggqqup-spi12-data-clk-state gpio48gpio49gpio50 %qup1_se4 . Ggpqup-spi13-cs-state gpio55 %qup1_se5 . Ggtqup-spi13-data-clk-state gpio52gpio53gpio54 %qup1_se5 . Ggsqup-spi14-cs-state gpio59 %qup1_se6 . Ggwqup-spi14-data-clk-state gpio56gpio57gpio58 %qup1_se6 . Ggvqup-spi15-cs-state gpio53 %qup1_se7 . Gg{qup-spi15-data-clk-state gpio54gpio55gpio52 %qup1_se7 . Ggzqup-spi16-cs-state gpio67 %qup2_se0 . GgEqup-spi16-data-clk-state gpio64gpio65gpio66 %qup2_se0 . GgDqup-spi17-cs-state gpio71 %qup2_se1 . GgHqup-spi17-data-clk-state gpio68gpio69gpio70 %qup2_se1 . GgGqup-spi18-cs-state gpio75 %qup2_se2 . GgLqup-spi18-data-clk-state gpio72gpio73gpio74 %qup2_se2 . GgKqup-spi19-cs-state gpio79 %qup2_se3 . GgOqup-spi19-data-clk-state gpio76gpio77gpio78 %qup2_se3 . GgNqup-spi20-cs-state gpio83 %qup2_se4 . GgRqup-spi20-data-clk-state gpio80gpio81gpio82 %qup2_se4 . GgQqup-spi21-cs-state gpio87 %qup2_se5 . GgUqup-spi21-data-clk-state gpio84gpio85gpio86 %qup2_se5 . GgTqup-spi22-cs-state gpio91 %qup2_se6 . GgYqup-spi22-data-clk-state gpio88gpio89gpio90 %qup2_se6 . GgXqup-spi23-cs-state gpio85 %qup2_se7 . Gg\qup-spi23-data-clk-state gpio86gpio87gpio84 %qup2_se7 . Gg[qup-uart2-default-stateg‡cts-pins gpio8 %qup0_se2 . Grts-pins gpio9 %qup0_se2 . Gtx-pins gpio10 %qup0_se2 . Grx-pins gpio11 %qup0_se2 . Gqup-uart14-default-stategxcts-pins gpio56 %qup1_se6 Trts-pins gpio57 %qup1_se6 . Gtx-pins gpio58 %qup1_se6 . Grx-pins gpio59 %qup1_se6 ˆqup-uart21-default-stategVtx-pins gpio86 %qup2_se5 . Grx-pins gpio87 %qup2_se5 . Gsdc2-default-stategŠclk-pins sdc2_clk . Gcmd-pins sdc2_cmd .  ˆdata-pins sdc2_data .  ˆsdc2-sleep-stateg‹clk-pins sdc2_clk . Gcmd-pins sdc2_cmd . ˆdata-pins sdc2_data . ˆec-int-n-state gpio66 %gpio Gg¡eusb3-reset-n-state gpio6 %gpio . G {gœeusb5-reset-n-state gpio7 %gpio . G {g›eusb6-reset-n-state gpio184 %gpio . G {g�hdmi-hpd-default-state gpio126 %usb2_dp GgÀtpad-default-state gpio3 %gpio ˆg~nvme-reg-en-state gpio18 %gpio . GgÎts0-default-stategcreset-n-pins gpio48 %gpio b .int-n-pins gpio51 %gpio Gkybd-default-state gpio67 %gpio Gg€edp-reg-en-state gpio70 %gpio . GgÌhall-int-n-state gpio92 %gpio Gg¿pcie4-default-stategËclkreq-n-pins gpio147 %pcie4_clk . ˆperst-n-pins gpio146 %gpio . Gwake-n-pins gpio148 %gpio . ˆpcie5-default-stategÈclkreq-n-pins gpio150 %pcie5_clk . ˆperst-n-pins gpio149 %gpio . Gwake-n-pins gpio151 %gpio . ˆpcie6a-default-stategÅclkreq-n-pins gpio153 %pcie6a_clk . ˆperst-n-pins gpio152 %gpio . Gwake-n-pins gpio154 %gpio . ˆrtmr1-reset-n-active-state gpio176 %gpio . Gg¨us-euro-hs-sel-state gpio68 %gpio • .gÊusb1-pwr-1p15-reg-en-state gpio188 %gpio . GgÒusb1-pwr-1p8-reg-en-state gpio175 %gpio . GgÓusb1-pwr-3p3-reg-en-state gpio186 %gpio . GgÔwcd-reset-n-active-state gpio191 %gpio . G {g»wwan-sw-en-state gpio221 %gpio . GgÕstm@10002000 2arm,coresight-stmarm,primecell — (ästm-basestm-stimulus-baseoÓ +apb_pclkout-portsportendpoint_-g4tpdm@10003000"2qcom,coresight-tpdmarm,primecell—0oÓ +apb_pclk ¤  º  $disabledout-portsportendpoint_.g/tpda@10004000"2qcom,coresight-tpdaarm,primecell—@oÓ +apb_pclkin-ports port@0—endpoint_/g.port@1—endpoint_0g2out-portsportendpoint_1g3tpdm@1000f000"2qcom,coresight-tpdmarm,primecell—ðoÓ +apb_pclk ¤  º out-portsportendpoint_2g0funnel@10041000+2arm,coresight-dynamic-funnelarm,primecell—oÓ +apb_pclkin-ports port@6—endpoint_3g1port@7—endpoint_4g-out-portsportendpoint_5g:funnel@10042000+2arm,coresight-dynamic-funnelarm,primecell— oÓ +apb_pclkin-ports port@2—endpoint_6g€port@5—endpoint_7gJport@6—endpoint_8grout-portsportendpoint_9g;funnel@10045000+2arm,coresight-dynamic-funnelarm,primecell—PoÓ +apb_pclkin-ports port@0—endpoint_:g5port@1—endpoint_;g9out-portsportendpoint_<gMtpdm@10800000"2qcom,coresight-tpdmarm,primecell—€oÓ +apb_pclk ¤@ º out-portsportendpoint_=gvtpdm@1082c000"2qcom,coresight-tpdmarm,primecell—‚ÀoÓ +apb_pclk Ì  â out-portsportendpoint_>gktpdm@10841000"2qcom,coresight-tpdmarm,primecell—„oÓ +apb_pclk ¤  º out-portsportendpoint_?gitpdm@10844000"2qcom,coresight-tpdmarm,primecell—„@oÓ +apb_pclk Ì  â out-portsportendpoint_@gAfunnel@10846000+2arm,coresight-dynamic-funnelarm,primecell—„`oÓ +apb_pclkin-portsportendpoint_Ag@out-portsportendpoint_Bghcti@1098b000 2arm,coresight-ctiarm,primecell—˜°oÓ +apb_pclktpdm@109d0000"2qcom,coresight-tpdmarm,primecell—�oÓ +apb_pclk Ì  â  $disabledout-portsportendpoint_Cgjtpdm@10ac0000"2qcom,coresight-tpdmarm,primecell—¬oÓ +apb_pclk Ì  â  $disabledout-portsportendpoint_DgFtpdm@10ac1000"2qcom,coresight-tpdmarm,primecell—¬oÓ +apb_pclk ¤@ º out-portsportendpoint_EgGtpda@10ac4000"2qcom,coresight-tpdaarm,primecell—¬@oÓ +apb_pclkin-ports port@8—endpoint_FgDport@9— endpoint_GgEout-portsportendpoint_HgIfunnel@10ac5000+2arm,coresight-dynamic-funnelarm,primecell—¬PoÓ +apb_pclkin-portsportendpoint_IgHout-portsportendpoint_Jg7funnel@10b04000+2arm,coresight-dynamic-funnelarm,primecell—°@oÓ +apb_pclkin-ports port@3—endpoint_Kgbport@6—endpoint_LgXport@7—endpoint_Mg<out-portsportendpoint_NgOtmc@10b05000 2arm,coresight-tmcarm,primecell—°PoÓ +apb_pclkgŒin-portsportendpoint_OgNout-portsportendpoint_PgQreplicator@10b06000/2arm,coresight-dynamic-replicatorarm,primecell—°`oÓ +apb_pclkin-portsportendpoint_QgPout-portsportendpoint_Rgtpda@10b08000"2qcom,coresight-tpdaarm,primecell—°€oÓ +apb_pclkin-ports port@0—endpoint_SgYport@1—endpoint_TgZport@2—endpoint_Ug[port@3—endpoint_Vg\port@4—endpoint_Wg]out-portsportendpoint_XgLtpdm@10b09000"2qcom,coresight-tpdmarm,primecell—°�oÓ +apb_pclk ¤@ º out-portsportendpoint_YgStpdm@10b0a000"2qcom,coresight-tpdmarm,primecell—° oÓ +apb_pclk ¤@ º out-portsportendpoint_ZgTtpdm@10b0b000"2qcom,coresight-tpdmarm,primecell—°°oÓ +apb_pclk ¤@ º out-portsportendpoint_[gUtpdm@10b0c000"2qcom,coresight-tpdmarm,primecell—°ÀoÓ +apb_pclk ¤@ º out-portsportendpoint_\gVtpdm@10b0d000"2qcom,coresight-tpdmarm,primecell—°ÐoÓ +apb_pclk Ì  â out-portsportendpoint_]gWtpdm@10b20000"2qcom,coresight-tpdmarm,primecell—²oÓ +apb_pclk Ì  â  $disabledout-portsportendpoint_^g_tpda@10b23000"2qcom,coresight-tpdaarm,primecell—²0oÓ +apb_pclk $disabledin-portsportendpoint__g^out-portsportendpoint_`gafunnel@10b24000+2arm,coresight-dynamic-funnelarm,primecell—²@oÓ +apb_pclk $disabledin-portsportendpoint_ag`out-portsportendpoint_bgKtpdm@10c08000"2qcom,coresight-tpdmarm,primecell—À€oÓ +apb_pclk Ì  â out-portsportendpoint_cgdfunnel@10c0b000+2arm,coresight-dynamic-funnelarm,primecell—À°oÓ +apb_pclkin-ports port@4—endpoint_dgcout-portsportendpoint_egutpdm@10c28000"2qcom,coresight-tpdmarm,primecell—€oÓ +apb_pclk Ì  â out-portsportendpoint_fgltpdm@10c29000"2qcom,coresight-tpdmarm,primecell—Â�oÓ +apb_pclk ¤@ º out-portsportendpoint_ggmtpda@10c2b000"2qcom,coresight-tpdaarm,primecell—°oÓ +apb_pclkin-ports port@4—endpoint_hgBport@13—endpoint_ig?port@14—endpoint_jgCport@15—endpoint_kg>port@1a—endpoint_lgfport@1b—endpoint_mggout-portsportendpoint_ngofunnel@10c2c000+2arm,coresight-dynamic-funnelarm,primecell—ÂÀoÓ +apb_pclkin-ports port@0—endpoint_ognport@4—endpoint_pg{port@5—endpoint_qg‚out-portsportendpoint_rg8tpdm@10c38000"2qcom,coresight-tpdmarm,primecell—ÀoÓ +apb_pclk ¤@ º out-portsportendpoint_sgwtpdm@10c39000"2qcom,coresight-tpdmarm,primecell—Ã�oÓ +apb_pclk ¤@ º out-portsportendpoint_tgxtpda@10c3c000"2qcom,coresight-tpdaarm,primecell—ÃÀoÓ +apb_pclkin-ports port@4—endpoint_ugeport@f—endpoint_vg=port@10—endpoint_wgsport@11—endpoint_xgtout-portsportendpoint_ygzfunnel@10c3d000+2arm,coresight-dynamic-funnelarm,primecell—ÃÐoÓ +apb_pclkin-portsportendpoint_zgyout-portsportendpoint_{gptpdm@10cc1000"2qcom,coresight-tpdmarm,primecell—ÌoÓ +apb_pclk ¤@ º  Ì  â  $disabledout-portsportendpoint_|g}tpda@10cc4000"2qcom,coresight-tpdaarm,primecell—Ì@oÓ +apb_pclkin-ports port@2—endpoint_}g|out-portsportendpoint_~gfunnel@10cc5000+2arm,coresight-dynamic-funnelarm,primecell—ÌPoÓ +apb_pclkin-portsportendpoint_g~out-portsportendpoint_€g6funnel@10d04000+2arm,coresight-dynamic-funnelarm,primecell—Ð@oÓ +apb_pclkin-ports port@6—endpoint_�g•out-portsportendpoint_‚gqtpdm@10d08000"2qcom,coresight-tpdmarm,primecell—ЀoÓ +apb_pclk ¤  º out-portsportendpoint_ƒg‹tpdm@10d09000"2qcom,coresight-tpdmarm,primecell—Ð�oÓ +apb_pclk ¤  º out-portsportendpoint_„gŒtpdm@10d0a000"2qcom,coresight-tpdmarm,primecell—РoÓ +apb_pclk ¤  º out-portsportendpoint_…g�tpdm@10d0b000"2qcom,coresight-tpdmarm,primecell—аoÓ +apb_pclk ¤  º out-portsportendpoint_†gŽtpdm@10d0c000"2qcom,coresight-tpdmarm,primecell—ÐÀoÓ +apb_pclk ¤  º out-portsportendpoint_‡g�tpdm@10d0d000"2qcom,coresight-tpdmarm,primecell—ÐÐoÓ +apb_pclk ¤  º out-portsportendpoint_ˆg�tpdm@10d0e000"2qcom,coresight-tpdmarm,primecell—ÐàoÓ +apb_pclk ¤  º out-portsportendpoint_‰g‘tpdm@10d0f000"2qcom,coresight-tpdmarm,primecell—ÐðoÓ +apb_pclk ¤  º out-portsportendpoint_Šg’tpda@10d12000"2qcom,coresight-tpdaarm,primecell—Ñ oÓ +apb_pclkin-ports port@0—endpoint_‹gƒport@1—endpoint_Œg„port@2—endpoint_�g…port@3—endpoint_Žg†port@4—endpoint_�g‡port@5—endpoint_�gˆport@6—endpoint_‘g‰port@7—endpoint_’gŠout-portsportendpoint_“g”funnel@10d13000+2arm,coresight-dynamic-funnelarm,primecell—Ñ0oÓ +apb_pclkin-portsportendpoint_”g“out-portsportendpoint_•g�iommu@1500000012qcom,x1e80100-smmu-500qcom,smmu-500arm,mmu-500—ŒÝAabcdefghijklmnopqrstuvµ¶·¸¹º»¼½¾¿À;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXY‹Œ�Ž��‘’“”•–—˜™¢£œ¥Ã§¨©²³´µ¶·¸¹±¾øg<iommu@15400000 2arm,smmu-v3—@±$ÝŠ†ˆSeventqgerrorcmdq-syncø $reservedg�interrupt-controller@17000000 2arm,gic-v3 —0 Ý ¿ª ô  ûgmsi-controller@170400002arm,gic-v3-its—  /gÁwatchdog@17410000%2qcom,apss-wdt-x1e80100qcom,kpss-wdt—Ao3 Ý $reservedgŽmailbox@174300002qcom,x1e80100-cpucp-mbox —Cƒ Ýèg#rsc@175000002qcom,rpmh-rsc0—PQRädrv-0drv-1drv-2$Ý :  J V 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1ì/audio-codec#1ô/hdmi-bridge/ports/port@0/endpoint#2/hdmi-bridge/ports/port@1/endpoint2/hdmi-connector/port/endpoint.2$/pmic-glink/connector@0/ports/port@0/endpoint.29/pmic-glink/connector@0/ports/port@1/endpoint.2N/pmic-glink/connector@0/ports/port@2/endpoint.2h/pmic-glink/connector@1/ports/port@0/endpoint.2}/pmic-glink/connector@1/ports/port@1/endpoint.2’/pmic-glink/connector@1/ports/port@2/endpoint2¬/mux-controller2½/regulator-edp-3p32Ê/regulator-misc-3p32Ø/regulator-nvme2â/regulator-rtmr0-1p152ò/regulator-rtmr0-1p83/regulator-rtmr0-3p33/regulator-rtmr1-1p153 /regulator-rtmr1-1p83//regulator-rtmr1-3p33>/regulator-vph-pwr3F/regulator-wwan interrupt-parent#address-cells#size-cellsmodelcompatiblechassis-typeclock-frequency#clock-cellsphandleclocksclock-multclock-divdevice_typeregenable-methodnext-level-cachepower-domainspower-domain-namescache-levelcache-unifiedcpuentry-methodidle-state-namearm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-usremote-endpointinterconnectsqcom,dload-modemboxesmbox-namesshmem#power-domain-cells#interconnect-cellsqcom,bcm-votersinterruptsdomain-idle-statesrangesno-maphwlockssizereusablelinux,cma-defaultopp-hzrequired-oppsinterrupts-extendedqcom,smemqcom,local-pidqcom,remote-pidqcom,entry-name#qcom,smem-state-cellsinterrupt-controller#interrupt-cellsdma-ranges#reset-cells#mbox-cellsdma-channelsdma-channel-mask#dma-cellsiommusstatusclock-namesinterconnect-namesdmasdma-namespinctrl-0pinctrl-namesoperating-points-v2hid-descr-addrvdd-supplyvddl-supplywakeup-sourcevdd33-supplyvdd33-cap-supplyvddar-supplyvddat-supplyvddio-supplyreset-gpiosorientation-switchretimer-switch#phy-cellsvdd3v3-supplyvdd1v8-supplyinterrupt-names#qcom,sensors#thermal-sensor-cellsresetsvdda12-supplyphysreset-namesmode-switchvdda-phy-supplyvdda-pll-supplydata-lanesreg-namesbus-rangedma-coherentlinux,pci-domainnum-lanesinterrupt-map-maskinterrupt-mapassigned-clocksassigned-clock-rateseq-presets-8gtseq-presets-16gtsopp-peak-kBpsopp-levelclock-output-namesmsi-mapvddpe-3v3-supplywake-gpiosqcom,4ln-config-selqcom,eeqcom,controlled-remotelynum-channelsqcom,num-ees#hwlock-cellsqcom,gmu#cooling-cellsnvmem-cellsnvmem-cell-namesmemory-regionfirmware-nameqcom,opp-acd-levelopp-supported-hwqcom,qmp#iommu-cells#global-interruptsqcom,smem-statesqcom,smem-state-nameslabelqcom,glink-channelsqcom,non-secure-domainqcom,domainqcom,intents#sound-dai-cellsqcom,protection-domainsound-name-prefixqcom,din-portsqcom,dout-portsqcom,ports-sintervalqcom,ports-offset1qcom,ports-offset2qcom,ports-hstartqcom,ports-hstopqcom,ports-word-lengthqcom,ports-block-pack-modeqcom,ports-block-group-countqcom,ports-lane-controlqcom,rx-port-mappingvdd-1p8-supplyvdd-io-supplyqcom,port-mappingqcom,ports-sinterval-lowqcom,tx-port-mappingvdd-micb-supplyqcom,dmic-sample-rategpio-controller#gpio-cellsgpio-rangespinsfunctiondrive-strengthslew-ratebias-disablebias-bus-holdoutput-highinput-enableoutput-lowqcom,dll-configqcom,ddr-configbus-widthphy-namessnps,dis_u2_susphy_quirksnps,dis_enblslpm_quirksnps,usb3_lpm_capablesnps,dis-u1-entry-quirksnps,dis-u2-entry-quirkqcom,select-utmi-as-pipe-clkmaximum-speeddr_modeassigned-clock-parentslink-frequenciespower-supplyenable-gpiosqcom,pdc-rangesqcom,channellinux,codeqcom,no-alarmqcom,uefi-rtc-infobits#pwm-cellspower-sourceinput-disableoutput-enabledrive-push-pullqcom,drive-strengthvdd18-supplyvdd3-supplywakeup-parentgpio-reserved-rangesbias-pull-upbias-pull-downqcom,cmb-element-bitsqcom,cmb-msrs-numqcom,dsb-element-bitsqcom,dsb-msrs-num#redistributor-regionsredistributor-stridemsi-controller#msi-cellsqcom,tcs-offsetqcom,drv-idqcom,tcs-configqcom,pmic-idvdd-bob1-supplyvdd-bob2-supplyvdd-l1-l4-l10-supplyvdd-l2-l13-l14-supplyvdd-l5-l16-supplyvdd-l6-l7-supplyvdd-l8-l9-supplyvdd-l12-supplyvdd-l15-supplyvdd-l17-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-initial-moderegulator-always-onvdd-l1-supplyvdd-l2-supplyvdd-l3-supplyvdd-s4-supplyvdd-s1-supplyvdd-s2-supplyvdd-s5-supplyframe-numberthermal-sensorstemperaturehysteresispolling-delay-passivetripcooling-deviceqcom,micbias1-microvoltqcom,micbias2-microvoltqcom,micbias3-microvoltqcom,micbias4-microvoltqcom,mbhc-buttons-vthreshold-microvoltqcom,mbhc-headset-vthreshold-microvoltqcom,mbhc-headphone-vthreshold-microvoltqcom,rx-deviceqcom,tx-devicemux-controlsvdd-buck-supplyvdd-rxtx-supplyvdd-mic-bias-supplylinux,input-typewakeup-event-actionorientation-gpiospower-roledata-rolemux-supply#mux-control-cellsmux-gpiosgpioenable-active-highregulator-boot-onaudio-routinglink-namesound-daixo_boardsleep_clkbi_tcxo_div2bi_tcxo_ao_div2cpu0l2_0cpu1cpu2cpu3cpu4l2_1cpu5cpu6cpu7cpu8l2_2cpu9cpu10cpu11cpu_map_cluster2cluster_c4cluster_cl4cluster_cl5eud_inscmscmi_dvfsclk_virtmc_virtcpu_pd0cpu_pd1cpu_pd2cpu_pd3cpu_pd4cpu_pd5cpu_pd6cpu_pd7cpu_pd8cpu_pd9cpu_pd10cpu_pd11cluster_pd0cluster_pd1cluster_pd2system_pdgunyah_hyp_memhyp_elf_package_memncc_memcpucp_log_memcpucp_memtags_memxbl_dtlog_memxbl_ramdump_memaop_image_memaop_cmd_db_memaop_config_memtme_crash_dump_memtme_log_memuefi_log_memsecdata_apss_mempdp_ns_shared_memgpu_prr_memtpm_control_memusb_ucsi_shared_mempld_pep_mempld_gmu_mempld_pdp_memtz_stat_memxbl_tmp_buffer_memadsp_rpc_remote_heap_memspu_secure_shared_memory_memadsp_boot_dtb_memspss_region_memadsp_boot_memvideo_memadspslpi_memq6_adsp_dtb_memcdsp_memq6_cdsp_dtb_memgpu_microcode_memcvp_memcamera_memav1_encoder_memwpss_memq6_wpss_dtb_memxbl_sc_memqtee_memta_memtags_mem1llcc_lpi_memsmem_memqup_opp_table_100mhzqup_opp_table_120mhzsmp2p_adsp_outsmp2p_adsp_insmp2p_cdsp_outsmp2p_cdsp_insocgccipccgpi_dma2qupv3_2i2c16spi16i2c17spi17i2c18spi18i2c19spi19i2c20spi20i2c21spi21uart21i2c22spi22i2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