Ð þí·”8¬ø( œ¬À rockchip,px30-evbrockchip,px30 +7Rockchip PX30 EVBaliases=/ethernet@ff360000G/i2c@ff180000L/i2c@ff190000Q/i2c@ff1a0000V/i2c@ff1b0000[/serial@ff030000c/serial@ff158000k/serial@ff160000s/serial@ff168000{/serial@ff170000ƒ/serial@ff178000‹/spi@ff1d0000�/spi@ff1d8000•/mmc@ff370000š/mmc@ff380000Ÿ/mmc@ff390000cpus+cpu@0¤cpuarm,cortex-a35°´psciÂÉØèZ!cpu@1¤cpuarm,cortex-a35°´psciÂÉØèZ!cpu@2¤cpuarm,cortex-a35°´psciÂÉØèZ! cpu@3¤cpuarm,cortex-a35°´psciÂÉØèZ! idle-states)pscicpu-sleeparm,idle-state6G^xoú„!cluster-sleeparm,idle-state6G^�oôÐ!opp-table-0operating-points-v2�!opp-600000000›#ÃF ¢~ð~ð™p°œ@Áopp-816000000›0£, ¢��™p°œ@opp-1008000000›<Ü ¢íØíØ™p°œ@opp-1200000000›G†Œ ¢Ö Ö ™p°œ@opp-1296000000›M?d ¢™p™p™p°œ@arm-pmuarm,cortex-a35-pmu0ÍdefgØ display-subsystemrockchip,display-subsystemë ñokayexternal-gmac-clock fixed-clockøúð€ gmac_clkinpsci arm,psci-1.0»smctimerarm,armv8-timer0Í   thermal-zonessoc-thermal(>èLî^ tripstrip-point-0npzЫpassivetrip-point-1nLzЫpassive!soc-critnÁ8zÐ «criticalcooling-mapsmap0… Šÿÿÿÿÿÿÿÿ™map1… Šÿÿÿÿÿÿÿÿ™gpu-thermal(d>è^ xin24m fixed-clockøn6xin24m!tpower-management@ff000000$rockchip,px30-pmusysconsimple-mfd°ÿpower-controllerrockchip,px30-power-controller¦+!vpower-domain@5°Â<º¦power-domain@7°Â÷;º¦power-domain@9°  ²C@?º¦power-domain@10° @Âþÿ978:º¦power-domain@11° ¯ôKº¦power-domain@12° X·µ¶–—ýûüD56º¦power-domain@13° (³´ùú3º !"¦power-domain@14°ÂIº#¦syscon@ff010000'rockchip,px30-pmugrfsysconsimple-mfd°ÿ+!¤io-domains$rockchip,px30-pmu-io-voltage-domainñokayÁ$Ï$reboot-modesyscon-reboot-modeÝäRBÃôRBà RBÃRBÃRBÃserial@ff030000$rockchip,px30-uartsnps,dw-apb-uart°ÿ ÍÂ%%(baudclkapb_pclk4&&9txrxCMZdefault h'() ñdisabledi2s@ff060000rockchip,px30-i2s-tdm°ÿ Í Â(mclk_txmclk_rxhclk4&&9txrxr*„¿ †tx-mrx-mZdefault0h+,-./0123456’ ñdisabledi2s@ff070000&rockchip,px30-i2srockchip,rk3066-i2s°ÿ Í Â(i2s_clki2s_hclk4&&9txrxZdefaulth789:’ñokayi2s@ff080000&rockchip,px30-i2srockchip,rk3066-i2s°ÿ ÍÂ(i2s_clki2s_hclk4&&9txrxZdefaulth;<=>’ ñdisabledinterrupt-controller@ff131000 arm,gic-400£´@°ÿÿ ÿ@ ÿ`  Í !syscon@ff140000$rockchip,px30-grfsysconsimple-mfd°ÿ+!*io-domains rockchip,px30-io-voltage-domainñokayÉ?×@åAó$A?lvdsrockchip,px30-lvdsB"dphyr*,lvds ñdisabledports+port@0°+endpoint@0°<C!�endpoint@1°<D! serial@ff158000$rockchip,px30-uartsnps,dw-apb-uart°ÿ€ ÍÂI(baudclkapb_pclk4&&9txrxCMZdefaulthEFñokayserial@ff160000$rockchip,px30-uartsnps,dw-apb-uart°ÿ ÍÂJ(baudclkapb_pclk4&&9txrxCMZdefaulthG ñdisabledserial@ff168000$rockchip,px30-uartsnps,dw-apb-uart°ÿ€ ÍÂK(baudclkapb_pclk4&&9txrxCMZdefault hHIJ ñdisabledserial@ff170000$rockchip,px30-uartsnps,dw-apb-uart°ÿ ÍÂL(baudclkapb_pclk4&& 9txrxCMZdefault hKLM ñdisabledserial@ff178000$rockchip,px30-uartsnps,dw-apb-uart°ÿ€ ÍÂM(baudclkapb_pclk4& & 9txrxCMZdefault hNOPñokayi2c@ff180000&rockchip,px30-i2crockchip,rk3399-i2c°ÿÂN (i2cpclk ÍZdefaulthQ+ñokaypmic@20rockchip,rk809°  RÍZdefaulthSLmxin32k{T‡T“TŸT«U·UÃUÏUÛTregulatorsDCDC_REG1çvdd_logö~ð™p&q;O!”regulator-state-memay~ðDCDC_REG2çvdd_armö~ð™p&q;O!regulator-state-mem•y~ðDCDC_REG3çvcc_ddr;Oregulator-state-memaDCDC_REG4çvcc_3v0ö-ÆÀ-ÆÀ;O!Aregulator-state-memay-ÆÀDCDC_REG5 çvcc3v3_sysö2Z 2Z ;O!Uregulator-state-memay2Z LDO_REG1çvcc_1v0öB@B@;Oregulator-state-memayB@LDO_REG2çvcc_1v8öw@w@;O!?regulator-state-memayw@LDO_REG3çvdd_1v0öB@B@;Oregulator-state-memayB@LDO_REG4 çvcc3v0_pmuö-ÆÀ-ÆÀ;O!$regulator-state-memay-ÆÀLDO_REG5 çvccio_sdöw@2Z ;O!@regulator-state-memay2Z LDO_REG6çvcc_sdö2Z 2Z O!regulator-state-memay2Z LDO_REG7 çvcc2v8_dvpö*¹€*¹€O!Yregulator-state-mem•y*¹€LDO_REG8 çvcc1v8_dvpöw@w@O![regulator-state-memayw@LDO_REG9 çvcc1v5_dvpöã`ã`O!Zregulator-state-mem•yã`SWITCH_REG1 çvcc3v3_lcdO!WSWITCH_REG2 çvcc5v0_host;Oi2c@ff190000&rockchip,px30-i2crockchip,rk3399-i2c°ÿÂO (i2cpclk ÍZdefaulthV+ñokaysensor@dasahi-kasei,ak8963°  ®R´$¿100010001touchscreen@14goodix,gt1151° RÍ ÌR ÖR âWsensor@4c fsl,mma7660°L RÍi2c@ff1a0000&rockchip,px30-i2crockchip,rk3399-i2c°ÿÂP (i2cpclk Í ZdefaulthX+ñokayø† ï2,ov5695@36 ovti,ov5695°6YÂ4(xvclk*Z6[Zdefaulth\] Ö^portendpoint<_C!£i2c@ff1b0000&rockchip,px30-i2crockchip,rk3399-i2c°ÿ Q (i2cpclk Í Zdefaulth`+ ñdisabledspi@ff1d0000&rockchip,px30-spirockchip,rk3066-spi°ÿ ÍÂ$U(spiclkapb_pclk4& & 9txrxNZdefaulthabcd+ ñdisabledspi@ff1d8000&rockchip,px30-spirockchip,rk3066-spi°ÿ€ ÍÂ%V(spiclkapb_pclk4&&9txrxNZdefaulthefghi+ ñdisabledwatchdog@ff1e0000rockchip,px30-wdtsnps,dw-wdt°ÿÂ[ Í% ñdisabledpwm@ff200000&rockchip,px30-pwmrockchip,rk3328-pwm°ÿ Â"S (pwmpclkZdefaulthjU ñdisabledpwm@ff200010&rockchip,px30-pwmrockchip,rk3328-pwm°ÿ Â"S (pwmpclkZdefaulthkUñokay!±pwm@ff200020&rockchip,px30-pwmrockchip,rk3328-pwm°ÿ Â"S (pwmpclkZdefaulthlU ñdisabledpwm@ff200030&rockchip,px30-pwmrockchip,rk3328-pwm°ÿ 0Â"S (pwmpclkZdefaulthmU ñdisabledpwm@ff208000&rockchip,px30-pwmrockchip,rk3328-pwm°ÿ €Â#T (pwmpclkZdefaulthnU ñdisabledpwm@ff208010&rockchip,px30-pwmrockchip,rk3328-pwm°ÿ €Â#T (pwmpclkZdefaulthoU ñdisabledpwm@ff208020&rockchip,px30-pwmrockchip,rk3328-pwm°ÿ € Â#T (pwmpclkZdefaulthpU ñdisabledpwm@ff208030&rockchip,px30-pwmrockchip,rk3328-pwm°ÿ €0Â#T (pwmpclkZdefaulthqU ñdisabledtimer@ff210000*rockchip,px30-timerrockchip,rk3288-timer°ÿ! ÍÂY& (pclktimerdma-controller@ff240000arm,pl330arm,primecell°ÿ$@Í`» (apb_pclkw!&tsadc@ff280000rockchip,px30-tsadc°ÿ( Í$‚,’ÃPÂ,X(tsadcapb_pclk¨ †tsadc-apbr*§ÔÀZinitdefaultsleephr¾sÈrÒñokayèÿ! saradc@ff288000,rockchip,px30-saradcrockchip,rk3399-saradc°ÿ(€ ÍTÂ-W(saradcapb_pclk¥ †saradc-apbñokay,?!°nvmem@ff290000rockchip,px30-otp°ÿ)@Â/Za(otpapb_pclkphy´†phy+id@7°cpu-leakage@17°performance@1e°8clock-controller@ff2b0000rockchip,px30-cru°ÿ+ Ât% (xin24mgpllr*=8‚«°ðõ@I’FÏq ë ëÂðÑ€ðÑ€õá ëÂ!clock-controller@ff2bc000rockchip,px30-pmucru°ÿ+ÀÂt(xin24mr*=‚%%% ’G†Œõጺ€!%syscon@ff2c0000,rockchip,px30-usb2phy-grfsysconsimple-mfd°ÿ,+usb2phy@100rockchip,px30-usb2phy° Â% (phyclk‚Ju usb480m_phyñokay!uhost-porta ÍD llinestateñokay!xotg-porta$ÍBA@lotg-bvalidotg-idlinestateñokay!wphy@ff2e0000rockchip,px30-dsi-dphy°ÿ.Â% E (refpclk>†apba|v ñokay!Bphy@ff2f0000rockchip,px30-csi-dphy°ÿ/@ÂF(pclka|v /†apbr*ñokay!¢usb@ff3000000rockchip,px30-usbrockchip,rk3066-usbsnps,dwc2°ÿ0 Í>Â(otgŠotg’¤³€€@ w "usb2-phy|vñokayusb@ff340000 generic-ehci°ÿ4 Í<Âx"usb|vñokayusb@ff350000 generic-ohci°ÿ5 Í=Âx"usb|vñokayethernet@ff360000rockchip,px30-gmac°ÿ6 Í+lmacirq@Â>??@A²CL[(stmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macclk_mac_speedr*ÂrmiiZdefaulthyz|v ^ †stmmacethñokayËoutputØA ã^ ó  ÃPÃPmmc@ff370000.rockchip,px30-dw-mshcrockchip,rk3288-dw-mshc°ÿ7@ Í6 Â÷;CD(biuciuciu-driveciu-sample(3ðÑ€Zdefaulth{|}~|vñokayASd vƒ��«·@mmc@ff380000.rockchip,px30-dw-mshcrockchip,rk3288-dw-mshc°ÿ8@ Í7 Âÿ8EF(biuciuciu-driveciu-sample(3ðÑ€Zdefault h€�‚|v ñokaySÄÚèƒ�mmc@ff390000.rockchip,px30-dw-mshcrockchip,rk3288-dw-mshc°ÿ9@ Í5 Â9GH(biuciuciu-driveciu-sample(3ðÑ€Zdefault h„…†|v ñokayAóÚ臫A·?spi@ff3a0000 rockchip,sfc°ÿ:@ Í8Â:(clk_sfchclk_sfc hˆ‰ŠZdefault|v  ñdisablednand-controller@ff3b0000rockchip,px30-nfc°ÿ;@ Í9Âþ7(ahbnfc‚7’ðÑ€Zdefault h‹Œ�Ž��‘’|v  ñdisabledopp-table-1operating-points-v2!“opp-200000000› ë¢~ðopp-300000000›á£¢à˜opp-400000000›ׄ¢�opp-480000000›œ8¢*ˆgpu@ff400000$rockchip,px30-maliarm,mali-bifrost°ÿ@@$Í/.- ljobmmugpuÂIÉ|v“ñokay ”!video-codec@ff442000rockchip,px30-vpu°ÿD ÍPO lvepuvdpu¯ô (aclkhclk •|v iommu@ff442800rockchip,iommu°ÿD( ÍQ¯ô (aclkiface |v !•dsi@ff450000(rockchip,px30-mipi-dsisnps,dw-mipi-dsi°ÿE ÍKÂD(pclkB"dphy|v =†apbr*+ñokayports+port@0°+endpoint@0°<–!œendpoint@1°<—!Ÿport@1°endpoint<˜!španel@0xinpeng,xpp055c272° "™ ,? 9Wportendpoint<š!˜vop@ff460000rockchip,px30-vop-big°ÿFü ÍMµ–û(aclk_vopdclk_vophclk_vop345 †axiahbdclk ›|v ñokayport+! endpoint@0°<œ!–endpoint@1°<�!Ciommu@ff460f00rockchip,iommu°ÿF ÍMµû (aclkiface|v  ñokay!›vop@ff470000rockchip,px30-vop-lit°ÿGü ÍN¶—ü(aclk_vopdclk_vophclk_vop789 †axiahbdclk ž|v ñokayport+! endpoint@0°<Ÿ!—endpoint@1°< !Diommu@ff470f00rockchip,iommu°ÿG ÍN¶ü (aclkiface|v  ñokay!žisp@ff4a0000rockchip,px30-cif-isp°ÿJ€$ÍFIJ lispmimipi Â3´ú_(ispaclkhclkpclk ¡¢"dphy|v ñokayports+port@0°+endpoint@0°C<£!_iommu@ff4a8000rockchip,iommu°ÿJ€ ÍF´ú (aclkiface|v  D ñokay!¡qos@ff518000rockchip,px30-qossyscon°ÿQ€ !qos@ff520000rockchip,px30-qossyscon°ÿR !#qos@ff52c000rockchip,px30-qossyscon°ÿRÀ !qos@ff538000rockchip,px30-qossyscon°ÿS€ !qos@ff538080rockchip,px30-qossyscon°ÿS€€ !qos@ff538100rockchip,px30-qossyscon°ÿS� !qos@ff538180rockchip,px30-qossyscon°ÿS�€ !qos@ff540000rockchip,px30-qossyscon°ÿT !qos@ff540080rockchip,px30-qossyscon°ÿT€ !qos@ff548000rockchip,px30-qossyscon°ÿT€ !qos@ff548080rockchip,px30-qossyscon°ÿT€€ !qos@ff548100rockchip,px30-qossyscon°ÿT� ! qos@ff548180rockchip,px30-qossyscon°ÿT�€ !!qos@ff548200rockchip,px30-qossyscon°ÿT‚ !"qos@ff550000rockchip,px30-qossyscon°ÿU !qos@ff550080rockchip,px30-qossyscon°ÿU€ !qos@ff550100rockchip,px30-qossyscon°ÿU !qos@ff550180rockchip,px30-qossyscon°ÿU€ !qos@ff558000rockchip,px30-qossyscon°ÿU€ !qos@ff558080rockchip,px30-qossyscon°ÿU€€ !pinctrlrockchip,px30-pinctrlr* _¤+ lgpio@ff040000rockchip,gpio-bank°ÿ ÍÂ% s ƒ´£!Rgpio@ff250000rockchip,gpio-bank°ÿ% ÍÂ\ s ƒ´£!³gpio@ff260000rockchip,gpio-bank°ÿ& ÍÂ] s ƒ´£!^gpio@ff270000rockchip,gpio-bank°ÿ' ÍÂ^ s ƒ´£pcfg-pull-up �!§pcfg-pull-down œ!®pcfg-pull-none «!¦pcfg-pull-none-2ma « ¸pcfg-pull-up-2ma � ¸pcfg-pull-up-4ma � ¸!¨pcfg-pull-none-4ma « ¸pcfg-pull-down-4ma œ ¸pcfg-pull-none-8ma « ¸!«pcfg-pull-up-8ma � ¸!©pcfg-pull-none-12ma « ¸ !­pcfg-pull-up-12ma � ¸ !¬pcfg-pull-none-smt « Ç!¥pcfg-output-high Üpcfg-output-low è!¯pcfg-input-high � ó!ªpcfg-input ói2c0i2c0-xfer ¥ ¥!Qi2c1i2c1-xfer ¥¥!Vi2c2i2c2-xfer ¥¥!Xi2c3i2c3-xfer  ¥ ¥!`tsadctsadc-otp-pin ¦!rtsadc-otp-out ¦!suart0uart0-xfer § §!'uart0-cts ¦!(uart0-rts ¦!)uart1uart1-xfer §§!Euart1-cts ¦!Fuart1-rts ¦uart2-m0uart2m0-xfer §§!Guart2-m1uart2m1-xfer  §§uart3-m0uart3m0-xfer §§uart3m0-cts ¦uart3m0-rts ¦uart3-m1uart3m1-xfer §§!Huart3m1-cts  ¦!Iuart3m1-rts  ¦!Juart4uart4-xfer §§!Kuart4-cts ¦!Luart4-rts ¦!Muart5uart5-xfer §§!Nuart5-cts ¦!Ouart5-rts ¦!Pspi0spi0-clk ¨!aspi0-csn ¨!bspi0-miso  ¨!cspi0-mosi  ¨!dspi0-clk-hs ©spi0-miso-hs  ©spi0-mosi-hs  ©spi1spi1-clk ¨!espi1-csn0  ¨!fspi1-csn1  ¨!gspi1-miso ¨!hspi1-mosi  ¨!ispi1-clk-hs ©spi1-miso-hs ©spi1-mosi-hs  ©pdmpdm-clk0m0 ¦pdm-clk0m1 ¦pdm-clk1 ¦pdm-sdi0m0 ¦pdm-sdi0m1 ¦pdm-sdi1 ¦pdm-sdi2 ¦pdm-sdi3 ¦pdm-clk0m0-sleep ªpdm-clk0m1-sleep ªpdm-clk1-sleep ªpdm-sdi0m0-sleep ªpdm-sdi0m1-sleep ªpdm-sdi1-sleep ªpdm-sdi2-sleep ªpdm-sdi3-sleep ªi2s0i2s0-8ch-mclk ¦i2s0-8ch-sclktx ¦!+i2s0-8ch-sclkrx  ¦!,i2s0-8ch-lrcktx ¦!-i2s0-8ch-lrckrx  ¦!.i2s0-8ch-sdo0 ¦!/i2s0-8ch-sdo1 ¦!1i2s0-8ch-sdo2 ¦!3i2s0-8ch-sdo3 ¦!5i2s0-8ch-sdi0 ¦!0i2s0-8ch-sdi1  ¦!2i2s0-8ch-sdi2  ¦!4i2s0-8ch-sdi3 ¦!6i2s1i2s1-2ch-mclk ¦i2s1-2ch-sclk ¦!7i2s1-2ch-lrck ¦!8i2s1-2ch-sdi ¦!9i2s1-2ch-sdo ¦!:i2s2i2s2-2ch-mclk ¦i2s2-2ch-sclk ¦!;i2s2-2ch-lrck ¦!<i2s2-2ch-sdi ¦!=i2s2-2ch-sdo ¦!>sdmmcsdmmc-clk «!{sdmmc-cmd ©!|sdmmc-det ©!}sdmmc-bus1 ©sdmmc-bus4@ ©©©©!~sdiosdio-clk ¦!‚sdio-cmd §!�sdio-bus4@ §§§§!€emmcemmc-clk  «!„emmc-cmd  ©!…emmc-rstnout  ¦emmc-bus1 ©emmc-bus4@ ©©©©emmc-bus8€ ©©©©©©©©!†emmc-reset  ¦!²flashflash-cs0 ¦!Žflash-rdy  ¦!�flash-dqs  ¦!’flash-ale  ¦!‹flash-cle  ¦!�flash-wrn  ¦!‘flash-csl ¦flash-rdn ¦!�flash-bus8€ ¬¬¬¬¬¬¬¬!Œsfcsfc-bus4@ ¦¦¦¦!Šsfc-bus2 ¦¦sfc-cs0 ¦!‰sfc-clk  ¦!ˆlcdclcdc-rgb-dclk-pin ­lcdc-rgb-m0-hsync-pin ­lcdc-rgb-m0-vsync-pin ­lcdc-rgb-m0-den-pin ­lcdc-rgb888-m0-data-pins€ «««« « « «««« « «««««««««««««lcdc-rgb666-m0-data-pins «««« « « «««« « «««««««lcdc-rgb565-m0-data-pins «««« « « «««« « «««««lcdc-rgb888-m1-data-pins «« « « «««««««««««««lcdc-rgb666-m1-data-pins° «« « « «««««««lcdc-rgb565-m1-data-pins� «« « « «««««pwm0pwm0-pin ¦!jpwm1pwm1-pin ¦!kpwm2pwm2-pin  ¦!lpwm3pwm3-pin ¦!mpwm4pwm4-pin ¦!npwm5pwm5-pin ¦!opwm6pwm6-pin ¦!ppwm7pwm7-pin ¦!qgmacrmii-pins� ­­­¦¦¦¦¦ ¦!ymac-refclk-12ma  ­!zmac-refclk  ¦cif-m0cif-clkout-m0  ­!\dvp-d2d9-m0À ¦¦¦¦¦¦¦¦¦ ¦ ¦ ¦dvp-d0d1-m0  ¦¦d10-d11-m0 ¦¦cif-m1cif-clkout-m1 ¦dvp-d2d9-m1À ¦¦¦¦ ¦ ¦¦¦¦¦¦¦dvp-d0d1-m1 ¦¦d10-d11-m1 ¦¦ispisp-prelight ¦headphonehp-det ®pmicpmic_int §!Ssoc_slppin_gpio ¯soc_slppin_slp ¦soc_slppin_rst ¦sdio-pwrseqwifi-enable-h ¦!´mipimipi-pdn ¦!]chosen serial5:115200n8adc-keys adc-keys ° &buttons 7w@ Qdbutton-esc _esc e pý0button-home _home ef p …€button-menu _menu e‹ pxbutton-down _volume down er p“àbutton-up _volume up es pBhbacklightpwm-backlight бa¨ �W!™emmc-pwrseqmmc-pwrseq-emmch²Zdefault Ö³ !‡sdio-pwrseqmmc-pwrseq-simpleZdefaulth´ ÖR!ƒvccsysregulator-fixed çvcc5v0_sys;OöLK@LK@!T compatibleinterrupt-parent#address-cells#size-cellsmodelethernet0i2c0i2c1i2c2i2c3serial0serial1serial2serial3serial4serial5spi0spi1mmc0mmc1mmc2device_typeregenable-methodclocks#cooling-cellscpu-idle-statesdynamic-power-coefficientoperating-points-v2cpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-usopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendinterruptsinterrupt-affinityportsstatusclock-frequencyclock-output-names#clock-cellspolling-delay-passivepolling-delaysustainable-powerthermal-sensorstemperaturehysteresistripcooling-devicecontribution#power-domain-cellspm_qospmuio1-supplypmuio2-supplyoffsetmode-bootloadermode-fastbootmode-loadermode-normalmode-recoveryclock-namesdmasdma-namesreg-shiftreg-io-widthpinctrl-namespinctrl-0rockchip,grfresetsreset-names#sound-dai-cells#interrupt-cellsinterrupt-controllervccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyphysphy-namesrockchip,outputremote-endpointrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-always-onregulator-boot-onregulator-on-in-suspendregulator-suspend-microvoltregulator-off-in-suspendgpiosvdd-supplymount-matrixirq-gpiosreset-gpiosVDDIO-supplyi2c-scl-falling-time-nsi2c-scl-rising-time-nsavdd-supplydvdd-supplydovdd-supplydata-lanesnum-cs#pwm-cellsarm,pl330-periph-burst#dma-cellsassigned-clocksassigned-clock-ratesrockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#io-channel-cellsvref-supplybits#reset-cellsassigned-clock-parents#phy-cellsinterrupt-namespower-domainsdr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizephy-modeclock_in_outphy-supplysnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-usbus-widthfifo-depthmax-frequencycap-mmc-highspeedcap-sd-highspeedcard-detect-delaysd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104vmmc-supplyvqmmc-supplykeep-power-in-suspendnon-removablemmc-pwrseqmmc-hs200-1_8vmali-supplyiommus#iommu-cellsbacklightiovcc-supplyvci-supplyrockchip,disable-mmu-resetrockchip,pmurangesgpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enableoutput-highoutput-lowinput-enablerockchip,pinsstdout-pathio-channelsio-channel-nameskeyup-threshold-microvoltpoll-intervallabellinux,codepress-threshold-microvoltpwmspower-supply