3x8%( %&hardkernel,odroid-m2rockchip,rk3588s +7Hardkernel ODROID-M2aliases=/pinctrl/gpio@fd8a0000C/pinctrl/gpio@fec20000I/pinctrl/gpio@fec30000O/pinctrl/gpio@fec40000U/pinctrl/gpio@fec50000[/i2c@fd880000`/i2c@fea90000e/i2c@feaa0000j/i2c@feab0000o/i2c@feac0000t/i2c@fead0000y/i2c@fec80000~/i2c@fec90000/i2c@feca0000/serial@fd890000/serial@feb40000/serial@feb50000/serial@feb60000/serial@feb70000/serial@feb80000/serial@feb90000/serial@feba0000/serial@febb0000/serial@febc0000/spi@feb00000/spi@feb10000/spi@feb20000/spi@feb30000/spi@fecb0000/ethernet@fe1c0000/mmc@fe2e0000/mmc@fe2c0000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1cluster2core0core1 cpu@0 cpuarm,cortex-a55psci': A Q0,f v@@  'cpu@100 cpuarm,cortex-a55psci': f v@@ 'cpu@200 cpuarm,cortex-a55psci': f v@@ 'cpu@300 cpuarm,cortex-a55psci': f v@@ 'cpu@400 cpuarm,cortex-a76psci': A Q0,f v@@'cpu@500 cpuarm,cortex-a76psci': f v@@'cpu@600 cpuarm,cortex-a76psci': A Q0,f v@@'cpu@700 cpuarm,cortex-a76psci': f v@@' idle-states/pscicpu-sleeparm,idle-state<Mddux' l2-cache-l0cachex@' l2-cache-l1cachex@'l2-cache-l2cachex@'l2-cache-l3cachex@'l2-cache-b0cachex@'l2-cache-b1cachex@'l2-cache-b2cachex@'l2-cache-b3cachex@'l3-cachecachex0@'display-subsystemrockchip,display-subsystemfirmwareopteelinaro,optee-tz smcscmi arm,scmi-smc+protocol@14' protocol@16pmu-a55arm,cortex-a55-pmupmu-a76arm,cortex-a76-pmupsci arm,psci-1.0 smcclock-0 fixed-clock)׫splltimerarm,armv8-timerP    %sec-physphysvirthyp-physhyp-virtclock-1 fixed-clockn6xin24mclock-2 fixed-clockxin32kreserved-memory+shmem@10f000arm,scmi-shmem&'gpu@fb000000*rockchip,rk3588-maliarm,mali-valhall-csf A Q :-corecoregroupstacks 0\]^ jobmmugpu9 Gokay!N"'usb@fc000000rockchip,rk3588-dwc3snps,dwc3@:-ref_clksuspend_clkbus_clkZotg b#$gusb2-phyusb3-phy qutmi_wide9 zR Gokay-portendpoint=%'usb@fc800000"rockchip,rk3588-ehcigeneric-ehci:&b'gusb9 Gokayusb@fc840000"rockchip,rk3588-ohcigeneric-ohci:&b'gusb9 Gokayusb@fc880000"rockchip,rk3588-ehcigeneric-ehci:(b)gusb9 Gokayusb@fc8c0000"rockchip,rk3588-ohcigeneric-ohci:(b)gusb9 Gokayusb@fcd00000rockchip,rk3588-dwc3snps,dwc3@(:jihkr&-ref_clksuspend_clkbus_clkutmipipeZhostb* gusb3-phy qutmi_widez4 MGokayiommu@fc900000 arm,smmu-v3 @qsvoeventqgerrorpriqcmdq-syncg Gdisablediommu@fcb00000 arm,smmu-v3 @}{eventqgerrorpriqcmdq-syncg Gdisabledsyscon@fd58a000)rockchip,rk3588-pmugrfsysconsimple-mfdX'psyscon@fd58c000rockchip,rk3588-sys-grfsysconX'ksyscon@fd5a4000rockchip,rk3588-vop-grfsysconZ@ 'lsyscon@fd5a6000rockchip,rk3588-vo0-grfsysconZ` :'syscon@fd5a8000rockchip,rk3588-vo1-grfsysconZ@:'msyscon@fd5ac000rockchip,rk3588-usb-grfsysconZ@'syscon@fd5b0000rockchip,rk3588-php-grfsyscon['-syscon@fd5bc000$rockchip,rk3588-pipe-phy-grfsyscon['syscon@fd5c4000$rockchip,rk3588-pipe-phy-grfsyscon\@'syscon@fd5c8000$rockchip,rk3588-usbdpphy-grfsyscon\@'syscon@fd5d0000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd]@+'usb2phy@0rockchip,rk3588-usb2phy:-phyclk usb480m_phy0zmtphyapbGokay'otg-portGokay'#syscon@fd5d8000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd]@+usb2phy@8000rockchip,rk3588-usb2phy:-phyclk usb480m_phy2zotphyapbGokay'&host-portGokay+''syscon@fd5dc000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd]@+usb2phy@c000rockchip,rk3588-usb2phy:-phyclk usb480m_phy3zp tphyapbGokay'(host-portGokay,')syscon@fd5e0000$rockchip,rk3588-hdptxphy-grfsyscon^'syscon@fd5f0000rockchip,rk3588-iocsyscon_'sram@fd600000 mmio-sram``+clock-controller@fd7c0000rockchip,rk3588-cru|A]q@QA.2Fq)׫ׄe/ׄ eZ р -'i2c@fd880000(rockchip,rk3588-i2crockchip,rk3399-i2c=:ts -i2cpclk.default+Gokayregulator@42rockchip,rk8602Bvdd_cpu_big0_s0 dp%=R/'regulator-state-mem]regulator@43 rockchip,rk8603rockchip,rk8602Cvdd_cpu_big1_s0 dp%=R/'regulator-state-mem]serial@fd890000&rockchip,rk3588-uartsnps,dw-apb-uartK:-baudclkapb_pclkv00{txrx1default Gdisabledpwm@fd8b0000(rockchip,rk3588-pwmrockchip,rk3328-pwm: -pwmpclk2defaultGokay' pwm@fd8b0010(rockchip,rk3588-pwmrockchip,rk3328-pwm: -pwmpclk3default Gdisabledpwm@fd8b0020(rockchip,rk3588-pwmrockchip,rk3328-pwm : -pwmpclk4default Gdisabledpwm@fd8b0030(rockchip,rk3588-pwmrockchip,rk3328-pwm0: -pwmpclk5default Gdisabledpower-management@fd8d8000&rockchip,rk3588-pmusysconsimple-mfd'npower-controller!rockchip,rk3588-power-controller+Gokay' power-domain@8+power-domain@9  :!#" 678+power-domain@10 :!#"9power-domain@11 :!#":power-domain@12 :;<=>power-domain@13 +power-domain@14(:?power-domain@15 :@power-domain@16: ABC+power-domain@17 : DEFpower-domain@21: GHIJKLMN+power-domain@23:CAOpower-domain@14 :?power-domain@15:@power-domain@22:Ppower-domain@24:[Z]QR+power-domain@258:ZSpower-domain@268:QTUpower-domain@270:VWXY+power-domain@28 :Z[power-domain@29(:\]power-domain@30:z{^power-domain@31@:W_`abpower-domain@33!:WZ[power-domain@34":WZ[power-domain@37%:2cpower-domain@38&:45power-domain@40(dvideo-codec@fdb50000+rockchip,rk3588-vpu121rockchip,rk3568-vpuwvdpu: -aclkhclke9 iommu@fdb50800,rockchip,rk3588-iommurockchip,rk3568-iommu@v -aclkiface:9 g'erga@fdb80000(rockchip,rk3588-rgarockchip,rk3288-rgat:-aclkhclksclkzrqp tcoreaxiahb9 video-codec@fdba0000rockchip,rk3588-vepu121z: -aclkhclkf9 iommu@fdba0800,rockchip,rk3588-iommurockchip,rk3568-iommu@y: -aclkiface9 g'fvideo-codec@fdba4000rockchip,rk3588-vepu121@|: -aclkhclkg9 iommu@fdba4800,rockchip,rk3588-iommurockchip,rk3568-iommuH@{: -aclkiface9 g'gvideo-codec@fdba8000rockchip,rk3588-vepu121~: -aclkhclkh9 iommu@fdba8800,rockchip,rk3588-iommurockchip,rk3568-iommu@}: -aclkiface9 g'hvideo-codec@fdbac000rockchip,rk3588-vepu121: -aclkhclki9 iommu@fdbac800,rockchip,rk3588-iommurockchip,rk3568-iommu@: -aclkiface9 g'ivideo-codec@fdc70000rockchip,rk3588-av1-vpulvdpuAACQׄׄ:AC -aclkhclk9  zvop@fdd90000rockchip,rk3588-vop BPvopgamma-lut8:]\abcd[7-aclkhclkdclk_vp0dclk_vp1dclk_vp2dclk_vp3pclk_vopj9 klmn Gdisabledports+'port@0+port@1+port@2+port@3+iommu@fdd97e00,rockchip,rk3588-iommurockchip,rk3568-iommu ~:]\ -aclkifaceg9  Gdisabled'ji2s@fddc0000rockchip,rk3588-i2s-tdm:-mclk_txmclk_rxhclkAvo{tx9 zttx-m Gdisabledi2s@fddf0000rockchip,rk3588-i2s-tdm:445-mclk_txmclk_rxhclkA1vo{tx9 zttx-m Gdisabledi2s@fddfc000rockchip,rk3588-i2s-tdm:00,-mclk_txmclk_rxhclkA-vo{rx9 ztrx-m Gdisabledqos@fdf35000rockchip,rk3588-qossysconP ';qos@fdf35200rockchip,rk3588-qossysconR '<qos@fdf35400rockchip,rk3588-qossysconT '=qos@fdf35600rockchip,rk3588-qossysconV '>qos@fdf36000rockchip,rk3588-qossyscon` '^qos@fdf39000rockchip,rk3588-qossyscon 'cqos@fdf3d800rockchip,rk3588-qossyscon 'dqos@fdf3e000rockchip,rk3588-qossyscon '`qos@fdf3e200rockchip,rk3588-qossyscon '_qos@fdf3e400rockchip,rk3588-qossyscon 'aqos@fdf3e600rockchip,rk3588-qossyscon 'bqos@fdf40000rockchip,rk3588-qossyscon '\qos@fdf40200rockchip,rk3588-qossyscon ']qos@fdf40400rockchip,rk3588-qossyscon 'Vqos@fdf40500rockchip,rk3588-qossyscon 'Wqos@fdf40600rockchip,rk3588-qossyscon 'Xqos@fdf40800rockchip,rk3588-qossyscon 'Yqos@fdf41000rockchip,rk3588-qossyscon 'Zqos@fdf41100rockchip,rk3588-qossyscon '[qos@fdf60000rockchip,rk3588-qossyscon 'Aqos@fdf60200rockchip,rk3588-qossyscon 'Bqos@fdf60400rockchip,rk3588-qossyscon 'Cqos@fdf61000rockchip,rk3588-qossyscon 'Dqos@fdf61200rockchip,rk3588-qossyscon 'Eqos@fdf61400rockchip,rk3588-qossyscon 'Fqos@fdf62000rockchip,rk3588-qossyscon '?qos@fdf63000rockchip,rk3588-qossyscon0 '@qos@fdf64000rockchip,rk3588-qossyscon@ 'Oqos@fdf66000rockchip,rk3588-qossyscon` 'Gqos@fdf66200rockchip,rk3588-qossysconb 'Hqos@fdf66400rockchip,rk3588-qossyscond 'Iqos@fdf66600rockchip,rk3588-qossysconf 'Jqos@fdf66800rockchip,rk3588-qossysconh 'Kqos@fdf66a00rockchip,rk3588-qossysconj 'Lqos@fdf66c00rockchip,rk3588-qossysconl 'Mqos@fdf66e00rockchip,rk3588-qossysconn 'Nqos@fdf67000rockchip,rk3588-qossysconp 'Pqos@fdf67200rockchip,rk3588-qossysconr qos@fdf70000rockchip,rk3588-qossyscon '9qos@fdf71000rockchip,rk3588-qossyscon ':qos@fdf72000rockchip,rk3588-qossyscon '6qos@fdf72200rockchip,rk3588-qossyscon" '7qos@fdf72400rockchip,rk3588-qossyscon$ '8qos@fdf80000rockchip,rk3588-qossyscon 'Sqos@fdf81000rockchip,rk3588-qossyscon 'Tqos@fdf81200rockchip,rk3588-qossyscon 'Uqos@fdf82000rockchip,rk3588-qossyscon 'Qqos@fdf82200rockchip,rk3588-qossyscon" 'Rdfi@fe060000rockchip,rk3588-dfi@&0:ppcie@fe180000*rockchip,rk3588-pcierockchip,rk3568-pcie*0?0:CH>MR)-aclk_mstaclk_slvaclk_dbipclkauxpipe pciPsyspmcmsglegacyerr4E`Xqqqqfw0r0b* gpcie-phy9 "T @ @0 @@dbiapbconfigz). tpwrpipe+ Gdisabledlegacy-interrupt-controller4 'qpcie@fe190000*rockchip,rk3588-pcierockchip,rk3568-pcie*@O0:DI?NSs)-aclk_mstaclk_slvaclk_dbipclkauxpipe pciPsyspmcmsglegacyerr4E`Xssssfw@r@bt gpcie-phy9 "T @ @0 A@dbiapbconfigz*/ tpwrpipe+Gokaydefaultu vwlegacy-interrupt-controller4 'sethernet@fe1c0000&rockchip,rk3588-gmacsnps,dwmac-4.20a macirqeth_wake_irq(:67Y^50-stmmacethclk_mac_refpclk_macaclk_macptp_ref9 !z$ tstmmacethk-xyz!Gokay*output7{ Brgmii-id|default}~mdiosnps,dwmac-mdio+ethernet-phy@1ethernet-phy-id001c.c916KN [ '{stmmac-axi-configmw'xrx-queues-config'yqueue0queue1tx-queues-config'zqueue0queue1sata@fe210000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci!(:b_eTo-satapmaliverxoobrefasic+ Gdisabledsata-port@0@bt gsata-phy  sata@fe230000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci#(:dagVq-satapmaliverxoobrefasic+ Gdisabledsata-port@0@b* gsata-phy  spi@fe2b0000 rockchip,sfc+@:/0-clk_sfchclk_sfc+ Gdisabledmmc@fe2c00000rockchip,rk3588-dw-mshcrockchip,rk3288-dw-mshc,@ :  -biuciuciu-driveciu-sample рdefault9 (Gokay# 4=HOWeqmmc@fe2d00000rockchip,rk3588-dw-mshcrockchip,rk3288-dw-mshc-@ :-biuciuciu-driveciu-sample default9 % Gdisabledmmc@fe2e0000rockchip,rk3588-dwcmshc.A-., Q n6 (:,*+-.-corebusaxiblocktimer default(ztcorebusaxiblocktimerGokay~Oe|qi2s@fe470000rockchip,rk3588-i2s-tdmG:+/(-mclk_txmclk_rxhclkA)-v00{txrx9 &z*+ ttx-mrx-mdefault( Gdisabledi2s@fe480000rockchip,rk3588-i2s-tdmH:y}u-mclk_txmclk_rxhclkv00{txrxz^_ ttx-mrx-mdefault( Gdisabledi2s@fe490000(rockchip,rk3588-i2srockchip,rk3066-i2sI:-i2s_clki2s_hclkAv{txrx9 &default Gdisabledi2s@fe4a0000(rockchip,rk3588-i2srockchip,rk3066-i2sJ:%-i2s_clki2s_hclkA"v{txrx9 &default Gdisabledinterrupt-controller@fe600000 arm,gic-v3 `h a84+'msi-controller@fe640000arm,gic-v3-itsd'rmsi-controller@fe660000arm,gic-v3-itsfppi-partitionsinterrupt-partition-0 'interrupt-partition-1  'dma-controller@fea10000arm,pl330arm,primecell@ VW :n -apb_pclk %'0dma-controller@fea30000arm,pl330arm,primecell@ XY :o -apb_pclk %'i2c@fea90000(rockchip,rk3588-i2crockchip,rk3399-i2c:{ -i2cpclk>default+ Gdisabledi2c@feaa0000(rockchip,rk3588-i2crockchip,rk3399-i2c:| -i2cpclk?default+Gokayregulator@42rockchip,rk8602B vdd_npu_s0 dp%~=R/regulator-state-mem]i2c@feab0000(rockchip,rk3588-i2crockchip,rk3399-i2c:} -i2cpclk@default+ Gdisabledi2c@feac0000(rockchip,rk3588-i2crockchip,rk3399-i2c:~ -i2cpclkAdefault+ Gdisabledi2c@fead0000(rockchip,rk3588-i2crockchip,rk3399-i2c: -i2cpclkBdefault+ Gdisabledtimer@feae0000,rockchip,rk3588-timerrockchip,rk3288-timer !:TW -pclktimerwatchdog@feaf0000 rockchip,rk3588-wdtsnps,dw-wdt:dc -tclkpclk;spi@feb00000(rockchip,rk3588-spirockchip,rk3066-spiF:-spiclkapb_pclkv00{txrx 0 default+ Gdisabledspi@feb10000(rockchip,rk3588-spirockchip,rk3066-spiG:-spiclkapb_pclkv00{txrx 0 default+ Gdisabledspi@feb20000(rockchip,rk3588-spirockchip,rk3066-spiH:-spiclkapb_pclkv{txrx 0default+GokayAQ pmic@0rockchip,rk806 7 C default SB@ e }/ / / / / / / / / /  /   *dvs1-null-pins 6gpio_pwrctrl1 ;pin_fun0'dvs2-null-pins 6gpio_pwrctrl2 ;pin_fun0'dvs3-null-pins 6gpio_pwrctrl3 ;pin_fun0'regulatorsdcdc-reg1 vdd_gpu_s0 dp%~=0 D'"regulator-state-mem]dcdc-reg2vdd_cpu_lit_s0 dp%~=0'regulator-state-mem]dcdc-reg3 vdd_logic_s0 L% q=0regulator-state-mem] ` qdcdc-reg4 vdd_vdenc_s0 dp%~=0regulator-state-mem]dcdc-reg5 vdd_ddr_s0 L% =0regulator-state-mem] ` Pdcdc-reg6 vdd2_ddr_s3regulator-state-mem |dcdc-reg7vdd_2v0_pldo_s3 %=0'regulator-state-mem | `dcdc-reg8 vcc_3v3_s3 2Z%2Z'regulator-state-mem | `2Zdcdc-reg9 vddq_ddr_s0regulator-state-mem]dcdc-reg10 vcc_1v8_s3 w@%w@regulator-state-mem | `w@pldo-reg1 vcc_1v8_s0 w@%w@'regulator-state-mem]pldo-reg2 vcca_1v8_s0 w@%w@'regulator-state-mem] `w@pldo-reg3 vdda_1v2_s0 O%Oregulator-state-mem]pldo-reg4 vcca_3v3_s0 2Z%2Z=0regulator-state-mem]pldo-reg5 vccio_sd_s0 w@%2Z=0'regulator-state-mem]pldo-reg6vcc_1v8_s3_pldo6 w@%w@regulator-state-mem | `w@nldo-reg1 vdd_0v75_s3 q% qregulator-state-mem | ` qnldo-reg2vdda_ddr_pll_s0 % regulator-state-mem] ` Pnldo-reg3 vdda_0v75_s0 |% |regulator-state-mem]nldo-reg4 vdda_0v85_s0 P% Pregulator-state-mem]nldo-reg5spi@feb30000(rockchip,rk3588-spirockchip,rk3066-spiI:-spiclkapb_pclkv{txrx 0 default+ Gdisabledserial@feb40000&rockchip,rk3588-uartsnps,dw-apb-uartL:-baudclkapb_pclkv00 {txrxdefault Gdisabledserial@feb50000&rockchip,rk3588-uartsnps,dw-apb-uartM:-baudclkapb_pclkv0 0 {txrxdefaultGokayserial@feb60000&rockchip,rk3588-uartsnps,dw-apb-uartN:-baudclkapb_pclkv0 0 {txrxdefault Gdisabledserial@feb70000&rockchip,rk3588-uartsnps,dw-apb-uartO:-baudclkapb_pclkv {txrxdefault Gdisabledserial@feb80000&rockchip,rk3588-uartsnps,dw-apb-uartP:-baudclkapb_pclkv {txrxdefault Gdisabledserial@feb90000&rockchip,rk3588-uartsnps,dw-apb-uartQ:-baudclkapb_pclkv {txrxdefault Gdisabledserial@feba0000&rockchip,rk3588-uartsnps,dw-apb-uartR:-baudclkapb_pclkvoo{txrxdefault Gdisabledserial@febb0000&rockchip,rk3588-uartsnps,dw-apb-uartS:-baudclkapb_pclkvo o {txrxdefault Gdisabledserial@febc0000&rockchip,rk3588-uartsnps,dw-apb-uartT:-baudclkapb_pclkvo o {txrxdefault Gdisabledpwm@febd0000(rockchip,rk3588-pwmrockchip,rk3328-pwm:LK -pwmpclkdefault Gdisabledpwm@febd0010(rockchip,rk3588-pwmrockchip,rk3328-pwm:LK -pwmpclkdefault Gdisabledpwm@febd0020(rockchip,rk3588-pwmrockchip,rk3328-pwm :LK -pwmpclkdefault Gdisabledpwm@febd0030(rockchip,rk3588-pwmrockchip,rk3328-pwm0:LK -pwmpclkdefault Gdisabledpwm@febe0000(rockchip,rk3588-pwmrockchip,rk3328-pwm:ON -pwmpclkdefault Gdisabledpwm@febe0010(rockchip,rk3588-pwmrockchip,rk3328-pwm:ON -pwmpclkdefault Gdisabledpwm@febe0020(rockchip,rk3588-pwmrockchip,rk3328-pwm :ON -pwmpclkdefault Gdisabledpwm@febe0030(rockchip,rk3588-pwmrockchip,rk3328-pwm0:ON -pwmpclkdefault Gdisabledpwm@febf0000(rockchip,rk3588-pwmrockchip,rk3328-pwm:RQ -pwmpclkdefault Gdisabledpwm@febf0010(rockchip,rk3588-pwmrockchip,rk3328-pwm:RQ -pwmpclkdefault Gdisabledpwm@febf0020(rockchip,rk3588-pwmrockchip,rk3328-pwm :RQ -pwmpclkdefault Gdisabledpwm@febf0030(rockchip,rk3588-pwmrockchip,rk3328-pwm0:RQ -pwmpclkdefault Gdisabledthermal-zonespackage-thermal   tripspackage-crit 8  criticalpackage-fan0  `active'cooling-mapsmap0  bigcore0-thermal d  tripsbigcore0-alert L passive'bigcore0-crit 8  criticalcooling-mapsmap0  bigcore2-thermal d  tripsbigcore2-alert L passive'bigcore2-crit 8  criticalcooling-mapsmap0   littlecore-thermal d  tripslittlecore-alert L passive'littlecore-crit 8  criticalcooling-mapsmap0 0 center-thermal   tripscenter-crit 8  criticalgpu-thermal d  tripsgpu-alert L passive'gpu-crit 8  criticalcooling-mapsmap0  npu-thermal   tripsnpu-crit 8  criticaltsadc@fec00000rockchip,rk3588-tsadc:-tsadcapb_pclkAQzVWttsadc-apbtsadc   ! <defaultsleep FGokay'adc@fec10000rockchip,rk3588-saradc \:-saradcapb_pclkzU tsaradc-apbGokay ni2c@fec80000(rockchip,rk3588-i2crockchip,rk3399-i2c: -i2cpclkCdefault+ Gdisabledi2c@fec90000(rockchip,rk3588-i2crockchip,rk3399-i2c: -i2cpclkDdefault+ Gdisabledi2c@feca0000(rockchip,rk3588-i2crockchip,rk3399-i2c: -i2cpclkEdefault+Gokayusb-typec@22 fcs,fusb302" default zconnectorusb-c-connector dual USB-C B@ dual d , sourceports+port@0endpoint='%port@1endpoint='port@2endpoint='rtc@51 nxp,pcf8563Q default spi@fecb0000(rockchip,rk3588-spirockchip,rk3066-spiJ:-spiclkapb_pclkvo o{txrx 0 default+ Gdisabledefuse@fecc0000rockchip,rk3588-otp :-otpapb_pclkphyarbz totpapbarb+cpu-code@2id@7cpu-leakage@17cpu-leakage@18cpu-leakage@19log-leakage@1agpu-leakage@1bcpu-version@1c npu-leakage@28(codec-leakage@29)dma-controller@fed10000arm,pl330arm,primecell@ Z[ :p -apb_pclk %'ophy@fed60000rockchip,rk3588-hdptx-phy :T-refapb8z#cde!""tphyapbinitcmnlaneroplllcpll Gdisabledphy@fed80000rockchip,rk3588-usbdp-phy:lV-refclkimmortalpclkutmi(z   tinitcmnlanepcs_apbpma_apb    %Gokay 5 A T b'$port+endpoint@0='endpoint@1='phy@fee00000rockchip,rk3588-naneng-combphy:vW -refapbpipeAQz<Ctphyapb p- Gokay'tphy@fee20000rockchip,rk3588-naneng-combphy:xW -refapbpipeAQz>Etphyapb p- Gokay'*sram@ff001000 mmio-sram+pinctrlrockchip,rk3588-pinctrl+'gpio@fd8a0000rockchip,gpio-bank:qr C  74'gpio@fec20000rockchip,gpio-bank:st C  74'vgpio@fec30000rockchip,gpio-bank:uv C @  74gpio@fec40000rockchip,gpio-bank:wx C `  74'gpio@fec50000rockchip,gpio-bank:yz C  74'pcfg-pull-up 'pcfg-pull-down 'pcfg-pull-none 'pcfg-pull-none-drv-level-2  'pcfg-pull-up-drv-level-1  'pcfg-pull-up-drv-level-2  'pcfg-pull-none-smt  'auddsmbt1120can0can1can2cifclk32kcpuddrphych0ddrphych1ddrphych2ddrphych3dp0dp1emmcemmc-rstnout 'emmc-bus8 'emmc-clk 'emmc-cmd 'emmc-data-strobe 'eth1fspigmac1gmac1-miim '}gmac1-clkinout 'gmac1-rx-bus20  'gmac1-tx-bus20    '~gmac1-rgmii-clk 'gmac1-rgmii-bus@ 'gpuhdmii2c0i2c0m2-xfer '.i2c1i2c1m0-xfer  'i2c2i2c2m0-xfer   'i2c3i2c3m0-xfer   'i2c4i2c4m0-xfer   'i2c5i2c5m0-xfer   'i2c6i2c6m0-xfer   'i2c7i2c7m0-xfer   'i2c8i2c8m2-xfer   'i2s0i2s0-lrck 'i2s0-sclk 'i2s0-sdi0 'i2s0-sdi1 'i2s0-sdi2 'i2s0-sdi3 'i2s0-sdo0 'i2s0-sdo1 'i2s0-sdo2 'i2s0-sdo3 'i2s1i2s1m0-lrck 'i2s1m0-sclk 'i2s1m0-sdi0 'i2s1m0-sdi1 'i2s1m0-sdi2 'i2s1m0-sdi3 'i2s1m0-sdo0  'i2s1m0-sdo1  'i2s1m0-sdo2  'i2s1m0-sdo3  'i2s2i2s2m1-lrck 'i2s2m1-sclk  'i2s2m1-sdi  'i2s2m1-sdo  'i2s3i2s3-lrck 'i2s3-sclk 'i2s3-sdi 'i2s3-sdo 'jtaglitcpumcumipinpupcie20x1pcie30phypcie30x1pcie30x2pcie30x4pdm0pdm1pmicpmic-pinsp 'pmupwm0pwm0m2-pins  '2pwm1pwm1m0-pins '3pwm2pwm2m0-pins '4pwm3pwm3m0-pins '5pwm4pwm4m0-pins  'pwm5pwm5m0-pins 'pwm6pwm6m0-pins  'pwm7pwm7m0-pins  'pwm8pwm8m0-pins  'pwm9pwm9m0-pins  'pwm10pwm10m0-pins  'pwm11pwm11m0-pins  'pwm12pwm12m0-pins  'pwm13pwm13m0-pins  'pwm14pwm14m0-pins  'pwm15pwm15m0-pins  'refclksatasata0sata1sata2sdiosdiom1-pins` 'sdmmcsdmmc-bus4@ 'sdmmc-clk 'sdmmc-cmd 'sdmmc-det 'spdif0spdif1spi0spi0m0-pins0 'spi0m0-cs0 'spi0m0-cs1 'spi1spi1m1-pins0 'spi1m1-cs0 'spi1m1-cs1 'spi2spi2m2-pins0  'spi2m2-cs0 'spi3spi3m1-pins0  'spi3m1-cs0 'spi3m1-cs1 'spi4spi4m0-pins0 'spi4m0-cs0 'spi4m0-cs1 'tsadctsadc-shut-org 'uart0uart0m1-xfer  '1uart1uart1m1-xfer   'uart2uart2m0-xfer   'uart3uart3m1-xfer   'uart4uart4m1-xfer   'uart5uart5m1-xfer   'uart6uart6m1-xfer   'uart7uart7m1-xfer   'uart8uart8m1-xfer   'uart9uart9m1-xfer   'vopbt656gpio-functsadc-gpio-func 'lcdlcd-pwren ' ledspwr-led  'sys-led  'pciepcie20x1-pins0 'upcie-pwren ' regulatorvcc5v0-pwren ' rtcpcf8563-int 'usbusb2-host-pwren 'usb3-host-pwren 'usb3-typec-pwren 'usbc0-int 'opp-table-cluster0operating-points-v2 ' opp-1008000000 <  L L~ @opp-1200000000 G  4 4~ @opp-1416000000 Tfr  ~ @ 0opp-1608000000 _"  P P~ @opp-1800000000 kI ~~~ @opp-table-cluster1operating-points-v2 'opp-1200000000 G  L LB@ @opp-1416000000 Tfr   B@ @opp-1608000000 _"  B@ @opp-1800000000 kI  P PB@ @opp-2016000000 x) HHB@ @opp-2208000000 h llB@ @opp-2400000000  B@B@B@ @opp-table-cluster2operating-points-v2 'opp-1200000000 G  L LB@ @opp-1416000000 Tfr   B@ @opp-1608000000 _"  B@ @opp-1800000000 kI  P PB@ @opp-2016000000 x) HHB@ @opp-2208000000 h llB@ @opp-2400000000  B@B@B@ @opp-tableoperating-points-v2'!opp-300000000   L L Popp-400000000 ׄ  L L Popp-500000000 e  L L Popp-600000000 #F  L L Popp-700000000 )'  ` ` Popp-800000000 /  q q Popp-900000000 5  5 5 Popp-1000000000 ;  P P Pchosen %I>R '/regulator-5v0-vcc-sysregulator-fixed  default  vcc5v0_sys LK@%LK@R 'regulator-5v0-vcc-usb2-hostregulator-fixed  vdefaultvcc5v0_usb2_host LK@%LK@R'+regulator-5v0-vcc-usb3-hostregulator-fixed  vdefaultvcc5v0_usb3_host LK@%LK@R',regulator-5v0-vcc-usb3-typecregulator-fixed  defaultvcc5v0_usb3_typec LK@%LK@R'regulator-5v0-vccaregulator-fixedvcca LK@%LK@R 'regulator-12v0-vcc-dcinregulator-fixed vcc12v_dcin %'  compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3spi4ethernet0mmc0mmc1cpudevice_typeregenable-methodcapacity-dmips-mhzclocksassigned-clocksassigned-clock-ratescpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachedynamic-power-coefficient#cooling-cellsoperating-points-v2cpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unifiedportsarm,smc-idshmem#clock-cells#reset-cellsinterruptsclock-frequencyclock-output-namesinterrupt-namesrangesno-mapclock-namespower-domainsstatusmali-supplydr_modephysphy-namesphy_typeresetssnps,dis_enblslpm_quirksnps,dis-u1-entry-quirksnps,dis-u2-entry-quirksnps,dis-u2-freeclk-exists-quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirkusb-role-switchremote-endpointsnps,dis_rxdet_inp3_quirk#iommu-cellsreset-names#phy-cellsphy-supplyrockchip,grfpinctrl-0pinctrl-namesfcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspenddmasdma-namesreg-shiftreg-io-width#pwm-cells#power-domain-cellspm_qosiommusreg-namesrockchip,vop-grfrockchip,vo1-grfrockchip,pmuassigned-clock-parents#sound-dai-cellsbus-range#interrupt-cellsinterrupt-map-maskinterrupt-maplinux,pci-domainmax-link-speedmsi-mapnum-lanesinterrupt-controllerreset-gpiosvpcie3v3-supplyrockchip,php-grfsnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsoclock_in_outphy-handlephy-modereset-assert-usreset-deassert-ussnps,blensnps,wr_osr_lmtsnps,rd_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-useports-implementedhba-port-capsnps,rx-ts-maxsnps,tx-ts-maxfifo-depthmax-frequencybus-widthcap-sd-highspeedcd-gpiosdisable-wpno-mmcno-sdiosd-uhs-sdr104vmmc-supplyvqmmc-supplymmc-hs400-1_8vmmc-hs400-enhanced-strobeno-sdnon-removablerockchip,trcm-sync-tx-onlymbi-aliasmbi-rangesmsi-controller#msi-cellsaffinityarm,pl330-periph-burst#dma-cellsnum-cs#gpio-cellsgpio-controllerspi-max-frequencysystem-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvcc13-supplyvcc14-supplyvcca-supplypinsfunctionregulator-enable-ramp-delayregulator-suspend-microvoltregulator-on-in-suspendpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresiscooling-devicetriprockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polaritypinctrl-1#thermal-sensor-cells#io-channel-cellsvref-supplyvbus-supplydata-rolelabelop-sink-microwattpower-rolesink-pdossource-pdostry-power-rolewakeup-sourcebitsrockchip,u2phy-grfrockchip,usb-grfrockchip,usbdpphy-grfrockchip,vo-grfmode-switchorientation-switchsbu1-dc-gpiossbu2-dc-gpiosrockchip,pipe-grfrockchip,pipe-phy-grfgpio-rangesbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendstdout-pathcolordefault-statelinux,default-triggercooling-levelsfan-supplypwmsenable-active-high