,8( (friendlyarm,nanopi-r6crockchip,rk3588s +7FriendlyElec NanoPi R6Caliases=/pinctrl/gpio@fd8a0000C/pinctrl/gpio@fec20000I/pinctrl/gpio@fec30000O/pinctrl/gpio@fec40000U/pinctrl/gpio@fec50000[/i2c@fd880000`/i2c@fea90000e/i2c@feaa0000j/i2c@feab0000o/i2c@feac0000t/i2c@fead0000y/i2c@fec80000~/i2c@fec90000/i2c@feca0000/serial@fd890000/serial@feb40000/serial@feb50000/serial@feb60000/serial@feb70000/serial@feb80000/serial@feb90000/serial@feba0000/serial@febb0000/serial@febc0000/spi@feb00000/spi@feb10000/spi@feb20000/spi@feb30000/spi@fecb0000/ethernet@fe1c0000/mmc@fe2c0000/mmc@fe2e0000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1cluster2core0core1 cpu@0 cpuarm,cortex-a55psci': A Q0,f v@@  'cpu@100 cpuarm,cortex-a55psci': f v@@ 'cpu@200 cpuarm,cortex-a55psci': f v@@ 'cpu@300 cpuarm,cortex-a55psci': f v@@ 'cpu@400 cpuarm,cortex-a76psci': A Q0,f v@@'cpu@500 cpuarm,cortex-a76psci': f v@@'cpu@600 cpuarm,cortex-a76psci': A Q0,f v@@'cpu@700 cpuarm,cortex-a76psci': f v@@' idle-states/pscicpu-sleeparm,idle-state<Mddux' l2-cache-l0cachex@' l2-cache-l1cachex@'l2-cache-l2cachex@'l2-cache-l3cachex@'l2-cache-b0cachex@'l2-cache-b1cachex@'l2-cache-b2cachex@'l2-cache-b3cachex@'l3-cachecachex0@'display-subsystemrockchip,display-subsystemfirmwareopteelinaro,optee-tz smcscmi arm,scmi-smc+protocol@14' protocol@16pmu-a55arm,cortex-a55-pmupmu-a76arm,cortex-a76-pmupsci arm,psci-1.0 smcclock-0 fixed-clock)׫splltimerarm,armv8-timerP    %sec-physphysvirthyp-physhyp-virtclock-1 fixed-clockn6xin24mclock-2 fixed-clockxin32kreserved-memory+shmem@10f000arm,scmi-shmem&'gpu@fb000000*rockchip,rk3588-maliarm,mali-valhall-csf A Q :-corecoregroupstacks 0\]^ jobmmugpu9  Gdisabled!'usb@fc000000rockchip,rk3588-dwc3snps,dwc3@:-ref_clksuspend_clkbus_clkNotg V"#[usb2-phyusb3-phy eutmi_wide9 nRu Gdisabledusb@fc800000"rockchip,rk3588-ehcigeneric-ehci:$V%[usb9 Gokayusb@fc840000"rockchip,rk3588-ohcigeneric-ohci:$V%[usb9 Gokayusb@fc880000"rockchip,rk3588-ehcigeneric-ehci:&V'[usb9  Gdisabledusb@fc8c0000"rockchip,rk3588-ohcigeneric-ohci:&V'[usb9  Gdisabledusb@fcd00000rockchip,rk3588-dwc3snps,dwc3@(:jihkr&-ref_clksuspend_clkbus_clkutmipipeNhostV( [usb3-phy eutmi_widen4u! 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Gdisabledpwm@fd8b0030(rockchip,rk3588-pwmrockchip,rk3328-pwm0: -pwmpclkw2defaultp Gdisabledpower-management@fd8d8000&rockchip,rk3588-pmusysconsimple-mfd'kpower-controller!rockchip,rk3588-power-controller{+Gokay' power-domain@8{+power-domain@9  :!#" 345{+power-domain@10 :!#"6{power-domain@11 :!#"7{power-domain@12 :89:;{power-domain@13 +{power-domain@14(:<{power-domain@15 :={power-domain@16: >?@+{power-domain@17 : ABC{power-domain@21: DEFGHIJK+{power-domain@23:CAL{power-domain@14 :<{power-domain@15:={power-domain@22:M{power-domain@24:[Z]NO+{power-domain@258:ZP{power-domain@268:QQR{power-domain@270:STUV+{power-domain@28 :WX{power-domain@29(:YZ{power-domain@30:z{[{power-domain@31@:W\]^_{power-domain@33!:WZ[{power-domain@34":WZ[{power-domain@37%:2`{power-domain@38&:45{power-domain@40(a{video-codec@fdb50000+rockchip,rk3588-vpu121rockchip,rk3568-vpuwvdpu: -aclkhclkb9 iommu@fdb50800,rockchip,rk3588-iommurockchip,rk3568-iommu@v -aclkiface:9 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'Wqos@fdf41100rockchip,rk3588-qossyscon 'Xqos@fdf60000rockchip,rk3588-qossyscon '>qos@fdf60200rockchip,rk3588-qossyscon '?qos@fdf60400rockchip,rk3588-qossyscon '@qos@fdf61000rockchip,rk3588-qossyscon 'Aqos@fdf61200rockchip,rk3588-qossyscon 'Bqos@fdf61400rockchip,rk3588-qossyscon 'Cqos@fdf62000rockchip,rk3588-qossyscon '<qos@fdf63000rockchip,rk3588-qossyscon0 '=qos@fdf64000rockchip,rk3588-qossyscon@ 'Lqos@fdf66000rockchip,rk3588-qossyscon` 'Dqos@fdf66200rockchip,rk3588-qossysconb 'Eqos@fdf66400rockchip,rk3588-qossyscond 'Fqos@fdf66600rockchip,rk3588-qossysconf 'Gqos@fdf66800rockchip,rk3588-qossysconh 'Hqos@fdf66a00rockchip,rk3588-qossysconj 'Iqos@fdf66c00rockchip,rk3588-qossysconl 'Jqos@fdf66e00rockchip,rk3588-qossysconn 'Kqos@fdf67000rockchip,rk3588-qossysconp 'Mqos@fdf67200rockchip,rk3588-qossysconr qos@fdf70000rockchip,rk3588-qossyscon '6qos@fdf71000rockchip,rk3588-qossyscon '7qos@fdf72000rockchip,rk3588-qossyscon '3qos@fdf72200rockchip,rk3588-qossyscon" '4qos@fdf72400rockchip,rk3588-qossyscon$ '5qos@fdf80000rockchip,rk3588-qossyscon 'Pqos@fdf81000rockchip,rk3588-qossyscon 'Qqos@fdf81200rockchip,rk3588-qossyscon 'Rqos@fdf82000rockchip,rk3588-qossyscon 'Nqos@fdf82200rockchip,rk3588-qossyscon" 'Odfi@fe060000rockchip,rk3588-dfi@&0:mpcie@fe180000*rockchip,rk3588-pcierockchip,rk3568-pcie0?0:CH>MR)-aclk_mstaclk_slvaclk_dbipclkauxpipe pciPsyspmcmsglegacyerr`,nnnn:KZ0o0bV( [pcie-phy9 "T @ @0 @@dbiapbconfign). Hpwrpipe+Gokay lpxqlegacy-interrupt-controller 'npcie@fe190000*rockchip,rk3588-pcierockchip,rk3568-pcie@O0:DI?NSs)-aclk_mstaclk_slvaclk_dbipclkauxpipe pciPsyspmcmsglegacyerr`,rrrr:KZ@o@bVs [pcie-phy9 "T @ @0 A@dbiapbconfign*/ Hpwrpipe+Gokay ltxqlegacy-interrupt-controller 'rethernet@fe1c0000&rockchip,rk3588-gmacsnps,dwmac-4.20a macirqeth_wake_irq(:67Y^50-stmmacethclk_mac_refpclk_macaclk_macptp_ref9 !n$ Hstmmacethjh*uvwGokayoutput x rgmii-rxidwyz{|}defaultBmdiosnps,dwmac-mdio+ethernet-phy@1ethernet-phy-id001c.c916defaultw~(N 8 lt'xstmmac-axi-configJTd'urx-queues-configt'vqueue0queue1tx-queues-config'wqueue0queue1sata@fe210000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci!(:b_eTo-satapmaliverxoobrefasic+ Gdisabledsata-port@0@Vs [sata-phy  sata@fe230000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci#(:dagVq-satapmaliverxoobrefasic+ Gdisabledsata-port@0@V( [sata-phy  spi@fe2b0000 rockchip,sfc+@:/0-clk_sfchclk_sfc+ Gdisabledmmc@fe2c00000rockchip,rk3588-dw-mshcrockchip,rk3288-dw-mshc,@ :  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pin_fun0'dvs2-null-pins gpio_pwrctrl2 pin_fun0'dvs3-null-pins gpio_pwrctrl3 pin_fun0'regulatorsdcdc-reg1dp~0 vdd_gpu_s0 regulator-state-mem1dcdc-reg2dp~0vdd_cpu_lit_s0'regulator-state-mem1dcdc-reg3 L q0 vdd_log_s0regulator-state-mem1  qdcdc-reg4dp~0 vdd_vdenc_s0regulator-state-mem1dcdc-reg5 L 0 vdd_ddr_s0regulator-state-mem1  Pdcdc-reg6 vdd2_ddr_s3regulator-state-mem 6dcdc-reg70vdd_2v0_pldo_s3'regulator-state-mem 6 dcdc-reg82Z2Z vcc_3v3_s3'regulator-state-mem 6 2Zdcdc-reg9 vddq_ddr_s0regulator-state-mem1dcdc-reg10w@w@ vcc_1v8_s3regulator-state-mem 6 w@pldo-reg1w@w@ avcc_1v8_s0'regulator-state-mem1 w@pldo-reg2w@w@ vcc_1v8_s0regulator-state-mem1 w@pldo-reg3OO avdd_1v2_s0regulator-state-mem1pldo-reg42Z2Z0 avcc_3v3_s0regulator-state-mem1pldo-reg5w@2Z0 vccio_sd_s0'regulator-state-mem1pldo-reg6w@w@ pldo6_s3regulator-state-mem 6 w@nldo-reg1 q q vdd_0v75_s3regulator-state-mem 6  qnldo-reg2 P Pavdd_ddr_pll_s0regulator-state-mem1  Pnldo-reg3 q q avdd_0v75_s0regulator-state-mem1nldo-reg4 P P avdd_0v85_s0regulator-state-mem1nldo-reg5 q q vdd_0v75_s0regulator-state-mem1spi@feb30000(rockchip,rk3588-spirockchip,rk3066-spiI:-spiclkapb_pclkJOtxrx wdefault+ Gdisabledserial@feb40000&rockchip,rk3588-uartsnps,dw-apb-uartL:-baudclkapb_pclkJ-- OtxrxwdefaultcY Gdisabledserial@feb50000&rockchip,rk3588-uartsnps,dw-apb-uartM:-baudclkapb_pclkJ- - OtxrxwdefaultcYGokayserial@feb60000&rockchip,rk3588-uartsnps,dw-apb-uartN:-baudclkapb_pclkJ- - OtxrxwdefaultcY Gdisabledserial@feb70000&rockchip,rk3588-uartsnps,dw-apb-uartO:-baudclkapb_pclkJ OtxrxwdefaultcY Gdisabledserial@feb80000&rockchip,rk3588-uartsnps,dw-apb-uartP:-baudclkapb_pclkJ OtxrxwdefaultcY Gdisabledserial@feb90000&rockchip,rk3588-uartsnps,dw-apb-uartQ:-baudclkapb_pclkJ OtxrxwdefaultcY Gdisabledserial@feba0000&rockchip,rk3588-uartsnps,dw-apb-uartR:-baudclkapb_pclkJllOtxrxwdefaultcY Gdisabledserial@febb0000&rockchip,rk3588-uartsnps,dw-apb-uartS:-baudclkapb_pclkJl l OtxrxwdefaultcY Gdisabledserial@febc0000&rockchip,rk3588-uartsnps,dw-apb-uartT:-baudclkapb_pclkJl l OtxrxwdefaultcY Gdisabledpwm@febd0000(rockchip,rk3588-pwmrockchip,rk3328-pwm:LK -pwmpclkwdefaultp Gdisabledpwm@febd0010(rockchip,rk3588-pwmrockchip,rk3328-pwm:LK -pwmpclkwdefaultp Gdisabledpwm@febd0020(rockchip,rk3588-pwmrockchip,rk3328-pwm :LK -pwmpclkwdefaultp Gdisabledpwm@febd0030(rockchip,rk3588-pwmrockchip,rk3328-pwm0:LK -pwmpclkwdefaultp Gdisabledpwm@febe0000(rockchip,rk3588-pwmrockchip,rk3328-pwm:ON -pwmpclkwdefaultp Gdisabledpwm@febe0010(rockchip,rk3588-pwmrockchip,rk3328-pwm:ON -pwmpclkwdefaultp Gdisabledpwm@febe0020(rockchip,rk3588-pwmrockchip,rk3328-pwm :ON -pwmpclkwdefaultp Gdisabledpwm@febe0030(rockchip,rk3588-pwmrockchip,rk3328-pwm0:ON -pwmpclkwdefaultp Gdisabledpwm@febf0000(rockchip,rk3588-pwmrockchip,rk3328-pwm:RQ -pwmpclkwdefaultp Gdisabledpwm@febf0010(rockchip,rk3588-pwmrockchip,rk3328-pwm:RQ -pwmpclkwdefaultp Gdisabledpwm@febf0020(rockchip,rk3588-pwmrockchip,rk3328-pwm :RQ -pwmpclkwdefaultp Gdisabledpwm@febf0030(rockchip,rk3588-pwmrockchip,rk3328-pwm0:RQ -pwmpclkwdefaultp Gdisabledthermal-zonespackage-thermal N d rtripspackage-crit 8  criticalbigcore0-thermal Nd d rtripsbigcore0-alert L passive'bigcore0-crit 8  criticalcooling-mapsmap0  bigcore2-thermal Nd d rtripsbigcore2-alert L passive'bigcore2-crit 8  criticalcooling-mapsmap0   littlecore-thermal Nd d rtripslittlecore-alert L passive'littlecore-crit 8  criticalcooling-mapsmap0 0 center-thermal N d rtripscenter-crit 8  criticalgpu-thermal Nd d rtripsgpu-alert L passive'gpu-crit 8  criticalcooling-mapsmap0  npu-thermal N d rtripsnpu-crit 8  criticaltsadc@fec00000rockchip,rk3588-tsadc:-tsadcapb_pclkAQnVWHtsadc-apbtsadc   w defaultsleep Gokay'adc@fec10000rockchip,rk3588-saradc :-saradcapb_pclknU Hsaradc-apbGokay ('i2c@fec80000(rockchip,rk3588-i2crockchip,rk3399-i2c: -i2cpclkCwdefault+Gokay @rtc@51haoyu,hym8563Qhym8563defaultw  4i2c@fec90000(rockchip,rk3588-i2crockchip,rk3399-i2c: -i2cpclkDwdefault+ Gdisabledi2c@feca0000(rockchip,rk3588-i2crockchip,rk3399-i2c: -i2cpclkEwdefault+ Gdisabledspi@fecb0000(rockchip,rk3588-spirockchip,rk3066-spiJ:-spiclkapb_pclkJl lOtxrx wdefault+ Gdisabledefuse@fecc0000rockchip,rk3588-otp :-otpapb_pclkphyarbn Hotpapbarb+cpu-code@2id@7cpu-leakage@17cpu-leakage@18cpu-leakage@19log-leakage@1agpu-leakage@1bcpu-version@1c Bnpu-leakage@28(codec-leakage@29)dma-controller@fed10000arm,pl330arm,primecell@ Z[:p -apb_pclk'lphy@fed60000rockchip,rk3588-hdptx-phy :T-refapbT8n#cde!""Hphyapbinitcmnlaneroplllcpllj Gdisabledphy@fed80000rockchip,rk3588-usbdp-phyT:lV-refclkimmortalpclkutmi(n   Hinitcmnlanepcs_apbpma_apb G Z k  Gdisabled'#phy@fee00000rockchip,rk3588-naneng-combphy:vW -refapbpipeAQTn<CHphyapb * Gokay'sphy@fee20000rockchip,rk3588-naneng-combphy:xW -refapbpipeAQTn>EHphyapb * Gokay'(sram@ff001000 mmio-sram+pinctrlrockchip,rk3588-pinctrlj+'gpio@fd8a0000rockchip,gpio-bank:qr   'gpio@fec20000rockchip,gpio-bank:st   'pgpio@fec30000rockchip,gpio-bank:uv  @  gpio@fec40000rockchip,gpio-bank:wx  `  'tgpio@fec50000rockchip,gpio-bank:yz   'pcfg-pull-up 'pcfg-pull-down 'pcfg-pull-none 'pcfg-pull-none-drv-level-2  'pcfg-pull-up-drv-level-1  'pcfg-pull-up-drv-level-2  'pcfg-pull-none-smt  'auddsmbt1120can0can1can2cifclk32kcpuddrphych0ddrphych1ddrphych2ddrphych3dp0dp1emmcemmc-rstnout 'emmc-bus8 'emmc-clk 'emmc-cmd 'emmc-data-strobe 'eth1fspigmac1gmac1-miim 'ygmac1-rx-bus20  '{gmac1-tx-bus20    'zgmac1-rgmii-clk '|gmac1-rgmii-bus@ '}gpuhdmii2c0i2c0m2-xfer '+i2c1i2c1m0-xfer   'i2c2i2c2m0-xfer   'i2c3i2c3m0-xfer   'i2c4i2c4m0-xfer   'i2c5i2c5m0-xfer   'i2c6i2c6m0-xfer   'i2c7i2c7m0-xfer   'i2c8i2c8m0-xfer   'i2s0i2s0-lrck 'i2s0-sclk 'i2s0-sdi0 'i2s0-sdi1 'i2s0-sdi2 'i2s0-sdi3 'i2s0-sdo0 'i2s0-sdo1 'i2s0-sdo2 'i2s0-sdo3 'i2s1i2s1m0-lrck 'i2s1m0-sclk 'i2s1m0-sdi0 'i2s1m0-sdi1 'i2s1m0-sdi2 'i2s1m0-sdi3 'i2s1m0-sdo0  'i2s1m0-sdo1  'i2s1m0-sdo2  'i2s1m0-sdo3  'i2s2i2s2m1-lrck 'i2s2m1-sclk  'i2s2m1-sdi  'i2s2m1-sdo  'i2s3i2s3-lrck 'i2s3-sclk 'i2s3-sdi 'i2s3-sdo 'jtaglitcpumcumipinpupcie20x1pcie30phypcie30x1pcie30x2pcie30x4pdm0pdm1pmicpmic-pinsp 'pmupwm0pwm0m0-pins '/pwm1pwm1m0-pins '0pwm2pwm2m0-pins '1pwm3pwm3m0-pins '2pwm4pwm4m0-pins  'pwm5pwm5m0-pins  'pwm6pwm6m0-pins  'pwm7pwm7m0-pins  'pwm8pwm8m0-pins  'pwm9pwm9m0-pins  'pwm10pwm10m0-pins  'pwm11pwm11m0-pins  'pwm12pwm12m0-pins  'pwm13pwm13m0-pins  'pwm14pwm14m0-pins  'pwm15pwm15m0-pins  'refclksatasata0sata1sata2sdiosdiom1-pins` 'sdmmcsdmmc-bus4@ 'sdmmc-clk 'sdmmc-cmd 'sdmmc-det 'sd-s0-pwr  'spdif0spdif1spi0spi0m0-pins0 'spi0m0-cs0 'spi0m0-cs1 'spi1spi1m1-pins0 'spi1m1-cs0 'spi1m1-cs1 'spi2spi2m2-pins0  'spi2m2-cs0  'spi3spi3m1-pins0  'spi3m1-cs0 'spi3m1-cs1 'spi4spi4m0-pins0 'spi4m0-cs0 'spi4m0-cs1 'tsadctsadc-shut-org 'uart0uart0m1-xfer  '.uart1uart1m1-xfer   'uart2uart2m0-xfer  'uart3uart3m1-xfer   'uart4uart4m1-xfer   'uart5uart5m1-xfer   'uart6uart6m1-xfer   'uart7uart7m1-xfer   'uart8uart8m1-xfer   'uart9uart9m1-xfer   'vopbt656gpio-functsadc-gpio-func 'gpio-keykey1-pin 'gpio-ledssys-led-pin 'wan-led-pin 'lan1-led-pin 'lan2-led-pin 'hym8563rtc-int 'usbtypec5v-pwren 'vcc5v0-host20-en  'rtl8211frtl8211f-rst '~opp-table-cluster0operating-points-v2 ' opp-1008000000 +< 2 L L~ @@opp-1200000000 +G 2 4 4~ @@opp-1416000000 +Tfr 2 ~ @@ Qopp-1608000000 +_" 2 P P~ @@opp-1800000000 +kI 2~~~ @@opp-table-cluster1operating-points-v2 'opp-1200000000 +G 2 L LB@ @@opp-1416000000 +Tfr 2  B@ @@opp-1608000000 +_" 2 B@ @@opp-1800000000 +kI 2 P PB@ @@opp-2016000000 +x) 2HHB@ @@opp-2208000000 +h 2llB@ @@opp-2400000000 +  2B@B@B@ @@opp-table-cluster2operating-points-v2 'opp-1200000000 +G 2 L LB@ @@opp-1416000000 +Tfr 2  B@ @@opp-1608000000 +_" 2 B@ @@opp-1800000000 +kI 2 P PB@ @@opp-2016000000 +x) 2HHB@ @@opp-2208000000 +h 2llB@ @@opp-2400000000 +  2B@B@B@ @@opp-tableoperating-points-v2'!opp-300000000 + 2 L L Popp-400000000 +ׄ 2 L L Popp-500000000 +e 2 L L Popp-600000000 +#F 2 L L Popp-700000000 +)' 2 ` ` Popp-800000000 +/ 2 q q Popp-900000000 +5 2 5 5 Popp-1000000000 +; 2 P P Pchosen ]serial2:1500000n8adc-keys adc-keys i ubuttons w@ dbutton-maskrom Maskrom h gpio-keys gpio-keysdefaultwbutton-user User  rp 2leds gpio-ledsled-0 sys_led rp heartbeatdefaultwled-1 wan_led rpdefaultwled-2 lan1_led rpdefaultwled-3 user_led rpdefaultwvcc5v0-sys-regulatorregulator-fixed vcc5v0_sysLK@LK@',vcc-1v1-nldo-s3-regulatorregulator-fixedvcc_1v1_nldo_s3&,'vcc-3v3-s0-regulatorregulator-fixed2Z2Z vcc_3v3_s0&vcc-3v3-sd-s0-regulatorregulator-fixed  r defaultwvcc_3v3_sd_s0--&'vcc3v3-pcie20-regulatorregulator-fixedvcc_3v3_pcie202Z2Z&'qvcc5v0-usb-regulatorregulator-fixed vcc5v0_usbLK@LK@&,'vcc5v0-usb-otg0-regulatorregulator-fixed  rpdefaultwvcc5v0_usb_otg0LK@LK@&vcc5v0-host-20-regulatorregulator-fixed  r defaultwvcc5v0_host_20LK@LK@&') compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3spi4ethernet0mmc0mmc1cpudevice_typeregenable-methodcapacity-dmips-mhzclocksassigned-clocksassigned-clock-ratescpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachedynamic-power-coefficient#cooling-cellsoperating-points-v2cpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unifiedportsarm,smc-idshmem#clock-cells#reset-cellsinterruptsclock-frequencyclock-output-namesinterrupt-namesrangesno-mapclock-namespower-domainsstatusdr_modephysphy-namesphy_typeresetssnps,dis_enblslpm_quirksnps,dis-u1-entry-quirksnps,dis-u2-entry-quirksnps,dis-u2-freeclk-exists-quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirksnps,dis_rxdet_inp3_quirk#iommu-cellsreset-names#phy-cellsphy-supplyrockchip,grfpinctrl-0pinctrl-namesfcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspenddmasdma-namesreg-shiftreg-io-width#pwm-cells#power-domain-cellspm_qosiommusreg-namesrockchip,vop-grfrockchip,vo1-grfrockchip,pmuassigned-clock-parents#sound-dai-cellsbus-range#interrupt-cellsinterrupt-map-maskinterrupt-maplinux,pci-domainmax-link-speedmsi-mapnum-lanesreset-gpiosvpcie3v3-supplyinterrupt-controllerrockchip,php-grfsnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsoclock_in_outphy-handlephy-modetx_delayreset-assert-usreset-deassert-ussnps,blensnps,wr_osr_lmtsnps,rd_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-useports-implementedhba-port-capsnps,rx-ts-maxsnps,tx-ts-maxfifo-depthmax-frequencybus-widthcap-sd-highspeeddisable-wpno-mmcno-sdiosd-uhs-sdr104vmmc-supplyvqmmc-supplyno-sdnon-removablemmc-hs200-1_8vrockchip,trcm-sync-tx-onlymbi-aliasmbi-rangesmsi-controller#msi-cellsaffinityarm,pl330-periph-burst#dma-cellsnum-csspi-max-frequencysystem-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvcc13-supplyvcc14-supplyvcca-supplygpio-controller#gpio-cellspinsfunctionregulator-enable-ramp-delayregulator-suspend-microvoltregulator-on-in-suspendpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polaritypinctrl-1#thermal-sensor-cells#io-channel-cellsvref-supplywakeup-sourcebitsrockchip,u2phy-grfrockchip,usb-grfrockchip,usbdpphy-grfrockchip,vo-grfrockchip,pipe-grfrockchip,pipe-phy-grfgpio-rangesbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendstdout-pathio-channelsio-channel-nameskeyup-threshold-microvoltpoll-intervallabellinux,codepress-threshold-microvoltdebounce-intervallinux,default-triggerenable-active-high