Q/8D ( #C0coolpi,pi-cm5-evbcoolpi,pi-cm5rockchip,rk3588 +7RK3588 CoolPi CM5 EVBaliases=/pinctrl/gpio@fd8a0000C/pinctrl/gpio@fec20000I/pinctrl/gpio@fec30000O/pinctrl/gpio@fec40000U/pinctrl/gpio@fec50000[/i2c@fd880000`/i2c@fea90000e/i2c@feaa0000j/i2c@feab0000o/i2c@feac0000t/i2c@fead0000y/i2c@fec80000~/i2c@fec90000/i2c@feca0000/serial@fd890000/serial@feb40000/serial@feb50000/serial@feb60000/serial@feb70000/serial@feb80000/serial@feb90000/serial@feba0000/serial@febb0000/serial@febc0000/spi@feb00000/spi@feb10000/spi@feb20000/spi@feb30000/spi@fecb0000/mmc@fe2e0000/mmc@fe2c0000/mmc@fe2d0000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1cluster2core0core1 cpu@0cpuarm,cortex-a55psci"5 < L0,a q~@@  "cpu@100cpuarm,cortex-a55psci"5 a q~@@ "cpu@200cpuarm,cortex-a55psci"5 a q~@@ "cpu@300cpuarm,cortex-a55psci"5 a q~@@ "cpu@400cpuarm,cortex-a76psci"5 < L0,a q~@@"cpu@500cpuarm,cortex-a76psci"5 a q~@@"cpu@600cpuarm,cortex-a76psci"5 < L0,a q~@@"cpu@700cpuarm,cortex-a76psci"5 a q~@@" idle-states*pscicpu-sleeparm,idle-state7H_dpx" l2-cache-l0caches@" l2-cache-l1caches@"l2-cache-l2caches@"l2-cache-l3caches@"l2-cache-b0caches@"l2-cache-b1caches@"l2-cache-b2caches@"l2-cache-b3caches@"l3-cachecaches0@"display-subsystemrockchip,display-subsystemfirmwareopteelinaro,optee-tzsmcscmi arm,scmi-smc+protocol@14" protocol@16pmu-a55arm,cortex-a55-pmupmu-a76arm,cortex-a76-pmupsci arm,psci-1.0smcclock-0 fixed-clock)׫splltimerarm,armv8-timerP    % sec-physphysvirthyp-physhyp-virtclock-1 fixed-clockn6xin24mclock-2 fixed-clockxin32kreserved-memory+shmem@10f000arm,scmi-shmem!"gpu@fb000000*rockchip,rk3588-maliarm,mali-valhall-csf < L 5(corecoregroupstacks 0\]^  jobmmugpu4 Bokay!I""usb@fc000000rockchip,rk3588-dwc3snps,dwc3@5(ref_clksuspend_clkbus_clkUotg ]#$busb2-phyusb3-phy lutmi_wide4 uR| Bdisabledusb@fc800000"rockchip,rk3588-ehcigeneric-ehci5%]&busb4 Bokayusb@fc840000"rockchip,rk3588-ohcigeneric-ohci5%]&busb4 Bokayusb@fc880000"rockchip,rk3588-ehcigeneric-ehci5'](busb4 Bokayusb@fc8c0000"rockchip,rk3588-ohcigeneric-ohci5'](busb4 Bokayusb@fcd00000rockchip,rk3588-dwc3snps,dwc3@(5jihkr&(ref_clksuspend_clkbus_clkutmipipeUhost]) busb3-phy lutmi_wideu4|( Bdisablediommu@fc900000 arm,smmu-v3 @qsvo eventqgerrorpriqcmdq-syncB Bdisablediommu@fcb00000 arm,smmu-v3 @}{ eventqgerrorpriqcmdq-syncB Bdisabledsyscon@fd58a000)rockchip,rk3588-pmugrfsysconsimple-mfdX"nsyscon@fd58c000rockchip,rk3588-sys-grfsysconX"isyscon@fd5a4000rockchip,rk3588-vop-grfsysconZ@ "jsyscon@fd5a6000rockchip,rk3588-vo0-grfsysconZ` 5"syscon@fd5a8000rockchip,rk3588-vo1-grfsysconZ@5"ksyscon@fd5ac000rockchip,rk3588-usb-grfsysconZ@"syscon@fd5b0000rockchip,rk3588-php-grfsyscon["+syscon@fd5bc000$rockchip,rk3588-pipe-phy-grfsyscon["syscon@fd5c4000$rockchip,rk3588-pipe-phy-grfsyscon\@"syscon@fd5c8000$rockchip,rk3588-usbdpphy-grfsyscon\@"syscon@fd5d0000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd]@+"usb2phy@0rockchip,rk3588-usb2phy5(phyclk usb480m_phy0umOphyapb Bdisabled"otg-port[ Bdisabled"#syscon@fd5d8000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd]@+usb2phy@8000rockchip,rk3588-usb2phy5(phyclk usb480m_phy2uoOphyapbBokay"%host-port[Bokayf*"&syscon@fd5dc000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd]@+usb2phy@c000rockchip,rk3588-usb2phy5(phyclk usb480m_phy3up OphyapbBokay"'host-port[Bokayf*"(syscon@fd5e0000$rockchip,rk3588-hdptxphy-grfsyscon^"syscon@fd5f0000rockchip,rk3588-iocsyscon_"sram@fd600000 mmio-sram``+clock-controller@fd7c0000rockchip,rk3588-cru|<]q@LA.2Fq)׫ׄe/ׄ eZ р q+"i2c@fd880000(rockchip,rk3588-i2crockchip,rk3399-i2c=5ts (i2cpclk~,default+Bokayregulator@42rockchip,rk8602Bvdd_cpu_big0_s0dp--"regulator-state-mem8regulator@43 rockchip,rk8603rockchip,rk8602Cvdd_cpu_big1_s0dp--"regulator-state-mem8serial@fd890000&rockchip,rk3588-uartsnps,dw-apb-uartK5(baudclkapb_pclkQ..Vtxrx~/default`j Bdisabledpwm@fd8b0000(rockchip,rk3588-pwmrockchip,rk3328-pwm5 (pwmpclk~0defaultw Bdisabledpwm@fd8b0010(rockchip,rk3588-pwmrockchip,rk3328-pwm5 (pwmpclk~1defaultw Bdisabledpwm@fd8b0020(rockchip,rk3588-pwmrockchip,rk3328-pwm 5 (pwmpclk~2defaultwBokay" pwm@fd8b0030(rockchip,rk3588-pwmrockchip,rk3328-pwm05 (pwmpclk~3defaultw Bdisabledpower-management@fd8d8000&rockchip,rk3588-pmusysconsimple-mfd"lpower-controller!rockchip,rk3588-power-controller+Bokay" power-domain@8+power-domain@9  5!#" 456+power-domain@10 5!#"7power-domain@11 5!#"8power-domain@12 59:;<power-domain@13 +power-domain@14(5=power-domain@15 5>power-domain@165 ?@A+power-domain@17 5 BCDpower-domain@215 EFGHIJKL+power-domain@235CAMpower-domain@14 5=power-domain@155>power-domain@225Npower-domain@245[Z]OP+power-domain@2585ZQpower-domain@2685QRSpower-domain@2705TUVW+power-domain@28 5XYpower-domain@29(5Z[power-domain@305z{\power-domain@31@5W]^_`power-domain@33!5WZ[power-domain@34"5WZ[power-domain@37%52apower-domain@38&545power-domain@40(bvideo-codec@fdb50000+rockchip,rk3588-vpu121rockchip,rk3568-vpuw vdpu5 (aclkhclkc4 iommu@fdb50800,rockchip,rk3588-iommurockchip,rk3568-iommu@v (aclkiface54 B"crga@fdb80000(rockchip,rk3588-rgarockchip,rk3288-rgat5(aclkhclksclkurqp Ocoreaxiahb4 video-codec@fdba0000rockchip,rk3588-vepu121z5 (aclkhclkd4 iommu@fdba0800,rockchip,rk3588-iommurockchip,rk3568-iommu@y5 (aclkiface4 B"dvideo-codec@fdba4000rockchip,rk3588-vepu121@|5 (aclkhclke4 iommu@fdba4800,rockchip,rk3588-iommurockchip,rk3568-iommuH@{5 (aclkiface4 B"evideo-codec@fdba8000rockchip,rk3588-vepu121~5 (aclkhclkf4 iommu@fdba8800,rockchip,rk3588-iommurockchip,rk3568-iommu@}5 (aclkiface4 B"fvideo-codec@fdbac000rockchip,rk3588-vepu1215 (aclkhclkg4 iommu@fdbac800,rockchip,rk3588-iommurockchip,rk3568-iommu@5 (aclkiface4 B"gvideo-codec@fdc70000rockchip,rk3588-av1-vpul vdpu<ACLׄׄ5AC (aclkhclk4  uvop@fdd90000rockchip,rk3588-vop BPvopgamma-lut85]\abcd[7(aclkhclkdclk_vp0dclk_vp1dclk_vp2dclk_vp3pclk_voph4 qijkl Bdisabledports+"port@0+port@1+port@2+port@3+iommu@fdd97e00,rockchip,rk3588-iommurockchip,rk3568-iommu ~5]\ (aclkifaceB4  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"Xqos@fdf41100rockchip,rk3588-qossyscon "Yqos@fdf60000rockchip,rk3588-qossyscon "?qos@fdf60200rockchip,rk3588-qossyscon "@qos@fdf60400rockchip,rk3588-qossyscon "Aqos@fdf61000rockchip,rk3588-qossyscon "Bqos@fdf61200rockchip,rk3588-qossyscon "Cqos@fdf61400rockchip,rk3588-qossyscon "Dqos@fdf62000rockchip,rk3588-qossyscon "=qos@fdf63000rockchip,rk3588-qossyscon0 ">qos@fdf64000rockchip,rk3588-qossyscon@ "Mqos@fdf66000rockchip,rk3588-qossyscon` "Eqos@fdf66200rockchip,rk3588-qossysconb "Fqos@fdf66400rockchip,rk3588-qossyscond "Gqos@fdf66600rockchip,rk3588-qossysconf "Hqos@fdf66800rockchip,rk3588-qossysconh "Iqos@fdf66a00rockchip,rk3588-qossysconj "Jqos@fdf66c00rockchip,rk3588-qossysconl "Kqos@fdf66e00rockchip,rk3588-qossysconn "Lqos@fdf67000rockchip,rk3588-qossysconp "Nqos@fdf67200rockchip,rk3588-qossysconr qos@fdf70000rockchip,rk3588-qossyscon "7qos@fdf71000rockchip,rk3588-qossyscon "8qos@fdf72000rockchip,rk3588-qossyscon "4qos@fdf72200rockchip,rk3588-qossyscon" "5qos@fdf72400rockchip,rk3588-qossyscon$ "6qos@fdf80000rockchip,rk3588-qossyscon "Qqos@fdf81000rockchip,rk3588-qossyscon "Rqos@fdf81200rockchip,rk3588-qossyscon "Sqos@fdf82000rockchip,rk3588-qossyscon "Oqos@fdf82200rockchip,rk3588-qossyscon" "Pdfi@fe060000rockchip,rk3588-dfi@&0:npcie@fe180000*rockchip,rk3588-pcierockchip,rk3568-pcie0?05CH>MR)(aclk_mstaclk_slvaclk_dbipclkauxpipepciP syspmcmsglegacyerr `3ooooARa0p0i]) bpcie-phy4 "T @ @0 @@dbiapbconfigu). Opwrpipe+Bokay sqrdefault~stuvwlegacy-interrupt-controller "opcie@fe190000*rockchip,rk3588-pcierockchip,rk3568-pcie@O05DI?NSs)(aclk_mstaclk_slvaclk_dbipclkauxpipepciP syspmcmsglegacyerr `3xxxxARa@p@i]y bpcie-phy4 "T @ @0 A@dbiapbconfigu*/ Opwrpipe+Bokay szrdefault~{legacy-interrupt-controller "xethernet@fe1c0000&rockchip,rk3588-gmacsnps,dwmac-4.20a  macirqeth_wake_irq(567Y^50(stmmacethclk_mac_refpclk_macaclk_macptp_ref4 !u$ Ostmmacethqi+|}~ Bdisabledmdiosnps,dwmac-mdio+stmmac-axi-config"|rx-queues-config/"}queue0queue1tx-queues-configE"~queue0queue1sata@fe210000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci!(5b_eTo(satapmaliverxoobrefasic[+ Bdisabledsata-port@0m@]y bsata-phyz  sata@fe230000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci#(5dagVq(satapmaliverxoobrefasic[+ Bdisabledsata-port@0m@]) bsata-phyz  spi@fe2b0000 rockchip,sfc+@5/0(clk_sfchclk_sfc+ Bdisabledmmc@fe2c00000rockchip,rk3588-dw-mshcrockchip,rk3288-dw-mshc,@ 5  (biuciuciu-driveciu-sampleрdefault~4 (Bokaymmc@fe2d00000rockchip,rk3588-dw-mshcrockchip,rk3288-dw-mshc-@ 5(biuciuciu-driveciu-sample default~4 % Bdisabledmmc@fe2e0000rockchip,rk3588-dwcmshc.<-., L n6 (5,*+-.(corebusaxiblocktimer ~default(uOcorebusaxiblocktimerBokay"<Bi2s@fe470000rockchip,rk3588-i2s-tdmG5+/((mclk_txmclk_rxhclk<)-Q..Vtxrx4 &u*+ Otx-mrx-mPdefault~Bokayport"endpointki2sv~"i2s@fe480000rockchip,rk3588-i2s-tdmH5y}u(mclk_txmclk_rxhclkQ..Vtxrxu^_ Otx-mrx-mPdefault(~ Bdisabledi2s@fe490000(rockchip,rk3588-i2srockchip,rk3066-i2sI5(i2s_clki2s_hclk<QVtxrx4 &default~ Bdisabledi2s@fe4a0000(rockchip,rk3588-i2srockchip,rk3066-i2sJ5%(i2s_clki2s_hclk<"QVtxrx4 &default~ Bdisabledinterrupt-controller@fe600000 arm,gic-v3 `h a8+"msi-controller@fe640000arm,gic-v3-itsd"pmsi-controller@fe660000arm,gic-v3-itsf"ppi-partitionsinterrupt-partition-0"interrupt-partition-1 "dma-controller@fea10000arm,pl330arm,primecell@ VW5n (apb_pclk".dma-controller@fea30000arm,pl330arm,primecell@ XY5o (apb_pclk"i2c@fea90000(rockchip,rk3588-i2crockchip,rk3399-i2c5{ (i2cpclk>~default+ Bdisabledi2c@feaa0000(rockchip,rk3588-i2crockchip,rk3399-i2c5| (i2cpclk?~default+Bokayregulator@42rockchip,rk8602B vdd_npu_s0dp~--regulator-state-mem8i2c@feab0000(rockchip,rk3588-i2crockchip,rk3399-i2c5} (i2cpclk@~default+ Bdisabledi2c@feac0000(rockchip,rk3588-i2crockchip,rk3399-i2c5~ (i2cpclkA~default+ Bdisabledi2c@fead0000(rockchip,rk3588-i2crockchip,rk3399-i2c5 (i2cpclkB~default+ Bdisabledtimer@feae0000,rockchip,rk3588-timerrockchip,rk3288-timer !5TW (pclktimerwatchdog@feaf0000 rockchip,rk3588-wdtsnps,dw-wdt5dc (tclkpclk;spi@feb00000(rockchip,rk3588-spirockchip,rk3066-spiF5(spiclkapb_pclkQ..Vtxrx ~default+ Bdisabledspi@feb10000(rockchip,rk3588-spirockchip,rk3066-spiG5(spiclkapb_pclkQ..Vtxrx ~default+ Bdisabledspi@feb20000(rockchip,rk3588-spirockchip,rk3066-spiH5(spiclkapb_pclkQVtxrx~default+Bokay<L pmic@0rockchip,rk806 default~ B@ - )- 5- A- M- Y- e- q- }- -  -   -dvs1-null-pins gpio_pwrctrl1 pin_fun0"dvs2-null-pins gpio_pwrctrl2 pin_fun0"dvs3-null-pins gpio_pwrctrl3 pin_fun0"regulatorsdcdc-reg1dp~0 vdd_gpu_s0 ""regulator-state-mem8dcdc-reg2dp~0vdd_cpu_lit_s0"regulator-state-mem8dcdc-reg3 L q0 vdd_log_s0regulator-state-mem8 qdcdc-reg4dp~0 vdd_vdenc_s0regulator-state-mem8dcdc-reg5 L 0 vdd_ddr_s0regulator-state-mem8 Pdcdc-reg6 vdd2_ddr_s3regulator-state-mem dcdc-reg70vdd_2v0_pldo_s3"regulator-state-mem  dcdc-reg82Z2Z vcc_3v3_s3regulator-state-mem  2Zdcdc-reg9 vddq_ddr_s0regulator-state-mem8dcdc-reg10w@w@ vcc_1v8_s3regulator-state-mem  w@pldo-reg1w@w@ avcc_1v8_s0" regulator-state-mem8pldo-reg2w@w@ vcc_1v8_s0"regulator-state-mem8 w@pldo-reg3OO avdd_1v2_s0regulator-state-mem8pldo-reg42Z2Z0 vcc_3v3_s0regulator-state-mem8pldo-reg5w@2Z0 vccio_sd_s0"regulator-state-mem8pldo-reg6w@w@ pldo6_s3regulator-state-mem  w@nldo-reg1 q q vdd_0v75_s3regulator-state-mem  qnldo-reg2 P Pvdd_ddr_pll_s0regulator-state-mem8 Pnldo-reg3 q q avdd_0v75_s0" regulator-state-mem8nldo-reg4 P P vdd_0v85_s0"regulator-state-mem8nldo-reg5 q q vdd_0v75_s0regulator-state-mem8spi@feb30000(rockchip,rk3588-spirockchip,rk3066-spiI5(spiclkapb_pclkQVtxrx ~default+ Bdisabledserial@feb40000&rockchip,rk3588-uartsnps,dw-apb-uartL5(baudclkapb_pclkQ.. Vtxrx~defaultj` Bdisabledserial@feb50000&rockchip,rk3588-uartsnps,dw-apb-uartM5(baudclkapb_pclkQ. . Vtxrx~defaultj`Bokayserial@feb60000&rockchip,rk3588-uartsnps,dw-apb-uartN5(baudclkapb_pclkQ. . Vtxrx~defaultj` Bdisabledserial@feb70000&rockchip,rk3588-uartsnps,dw-apb-uartO5(baudclkapb_pclkQ Vtxrx~defaultj` Bdisabledserial@feb80000&rockchip,rk3588-uartsnps,dw-apb-uartP5(baudclkapb_pclkQ Vtxrx~defaultj` Bdisabledserial@feb90000&rockchip,rk3588-uartsnps,dw-apb-uartQ5(baudclkapb_pclkQ Vtxrx~defaultj` Bdisabledserial@feba0000&rockchip,rk3588-uartsnps,dw-apb-uartR5(baudclkapb_pclkQmmVtxrx~defaultj` Bdisabledserial@febb0000&rockchip,rk3588-uartsnps,dw-apb-uartS5(baudclkapb_pclkQm m Vtxrx~defaultj` Bdisabledserial@febc0000&rockchip,rk3588-uartsnps,dw-apb-uartT5(baudclkapb_pclkQm m Vtxrx~defaultj` Bdisabledpwm@febd0000(rockchip,rk3588-pwmrockchip,rk3328-pwm5LK (pwmpclk~defaultw Bdisabledpwm@febd0010(rockchip,rk3588-pwmrockchip,rk3328-pwm5LK (pwmpclk~defaultw Bdisabledpwm@febd0020(rockchip,rk3588-pwmrockchip,rk3328-pwm 5LK (pwmpclk~defaultw Bdisabledpwm@febd0030(rockchip,rk3588-pwmrockchip,rk3328-pwm05LK (pwmpclk~defaultw Bdisabledpwm@febe0000(rockchip,rk3588-pwmrockchip,rk3328-pwm5ON (pwmpclk~defaultw Bdisabledpwm@febe0010(rockchip,rk3588-pwmrockchip,rk3328-pwm5ON (pwmpclk~defaultw Bdisabledpwm@febe0020(rockchip,rk3588-pwmrockchip,rk3328-pwm 5ON (pwmpclk~defaultw Bdisabledpwm@febe0030(rockchip,rk3588-pwmrockchip,rk3328-pwm05ON (pwmpclk~defaultw Bdisabledpwm@febf0000(rockchip,rk3588-pwmrockchip,rk3328-pwm5RQ (pwmpclk~defaultw Bdisabledpwm@febf0010(rockchip,rk3588-pwmrockchip,rk3328-pwm5RQ (pwmpclk~defaultw Bdisabledpwm@febf0020(rockchip,rk3588-pwmrockchip,rk3328-pwm 5RQ (pwmpclk~defaultw Bdisabledpwm@febf0030(rockchip,rk3588-pwmrockchip,rk3328-pwm05RQ (pwmpclk~defaultw Bdisabledthermal-zonespackage-thermal 4 J Xtripspackage-crit h8 t  criticalbigcore0-thermal 4d J Xtripsbigcore0-alert hL t passive"bigcore0-crit h8 t  criticalcooling-mapsmap0  bigcore2-thermal 4d J Xtripsbigcore2-alert hL t passive"bigcore2-crit h8 t  criticalcooling-mapsmap0   littlecore-thermal 4d J Xtripslittlecore-alert hL t passive"littlecore-crit h8 t  criticalcooling-mapsmap0 0 center-thermal 4 J Xtripscenter-crit h8 t  criticalgpu-thermal 4d J Xtripsgpu-alert hL t passive"gpu-crit h8 t  criticalcooling-mapsmap0  npu-thermal 4 J Xtripsnpu-crit h8 t  criticaltsadc@fec00000rockchip,rk3588-tsadc5(tsadcapb_pclk<LuVWOtsadc-apbtsadc   ~ defaultsleep Bokay"adc@fec10000rockchip,rk3588-saradc 5(saradcapb_pclkuU Osaradc-apbBokay i2c@fec80000(rockchip,rk3588-i2crockchip,rk3399-i2c5 (i2cpclkC~default+Bokayrtc@51haoyu,hym8563Q hym8563default~ i2c@fec90000(rockchip,rk3588-i2crockchip,rk3399-i2c5 (i2cpclkD~default+Bokayaudio-codec@10everest,es8316<1L51(mclkportendpoint~"i2c@feca0000(rockchip,rk3588-i2crockchip,rk3399-i2c5 (i2cpclkE~default+ Bdisabledspi@fecb0000(rockchip,rk3588-spirockchip,rk3066-spiJ5(spiclkapb_pclkQm mVtxrx ~default+ Bdisabledefuse@fecc0000rockchip,rk3588-otp 5(otpapb_pclkphyarbu Ootpapbarb+cpu-code@2id@7cpu-leakage@17cpu-leakage@18cpu-leakage@19log-leakage@1agpu-leakage@1bcpu-version@1c (npu-leakage@28(codec-leakage@29)dma-controller@fed10000arm,pl330arm,primecell@ Z[5p (apb_pclk"mphy@fed60000rockchip,rk3588-hdptx-phy 5T(refapb[8u#cde!""Ophyapbinitcmnlaneroplllcpllq Bdisabledphy@fed80000rockchip,rk3588-usbdp-phy[5lV(refclkimmortalpclkutmi(u   Oinitcmnlanepcs_apbpma_apb - @ Q g Bdisabled"$phy@fee00000rockchip,rk3588-naneng-combphy5vW (refapbpipe<L[u<COphyapb w+ Bokay"yphy@fee20000rockchip,rk3588-naneng-combphy5xW (refapbpipe<L[u>EOphyapb w+ Bokay")sram@ff001000 mmio-sram+pinctrlrockchip,rk3588-pinctrlq+"gpio@fd8a0000rockchip,gpio-bank5qr "gpio@fec20000rockchip,gpio-bank5st "gpio@fec30000rockchip,gpio-bank5uv @ gpio@fec40000rockchip,gpio-bank5wx ` "zgpio@fec50000rockchip,gpio-bank5yz "qpcfg-pull-up "pcfg-pull-down "pcfg-pull-none "pcfg-pull-none-drv-level-2  "pcfg-pull-up-drv-level-1  "pcfg-pull-up-drv-level-2  "pcfg-pull-none-smt  "auddsmbt1120can0can1can2cifclk32kcpuddrphych0ddrphych1ddrphych2ddrphych3dp0dp1emmcemmc-rstnout "emmc-bus8 "emmc-clk "emmc-cmd "emmc-data-strobe "eth1fspigmac1gpuhdmii2c0i2c0m2-xfer ",i2c1i2c1m0-xfer  "i2c2i2c2m0-xfer   "i2c3i2c3m0-xfer   "i2c4i2c4m0-xfer   "i2c5i2c5m0-xfer   "i2c6i2c6m0-xfer   "i2c7i2c7m0-xfer   "i2c8i2c8m0-xfer   "i2s0i2s0-lrck "i2s0-mclk "i2s0-sclk "i2s0-sdi0 "i2s0-sdo0 "i2s1i2s1m0-lrck "i2s1m0-sclk "i2s1m0-sdi0 "i2s1m0-sdi1 "i2s1m0-sdi2 "i2s1m0-sdi3 "i2s1m0-sdo0  "i2s1m0-sdo1  "i2s1m0-sdo2  "i2s1m0-sdo3  "i2s2i2s2m1-lrck "i2s2m1-sclk  "i2s2m1-sdi  "i2s2m1-sdo  "i2s3i2s3-lrck "i2s3-sclk "i2s3-sdi "i2s3-sdo "jtaglitcpumcumipinpupcie20x1pcie30phypcie30x1pcie30x2pcie30x4pdm0pdm1pmicpmic-pinsp "pmupwm0pwm0m0-pins "0pwm1pwm1m0-pins "1pwm2pwm2m0-pins "2pwm3pwm3m0-pins "3pwm4pwm4m0-pins  "pwm5pwm5m0-pins "pwm6pwm6m0-pins  "pwm7pwm7m0-pins  "pwm8pwm8m0-pins  "pwm9pwm9m0-pins  "pwm10pwm10m0-pins  "pwm11pwm11m0-pins  "pwm12pwm12m0-pins  "pwm13pwm13m0-pins  "pwm14pwm14m0-pins  "pwm15pwm15m0-pins  "refclksatasata0sata1sata2sdiosdiom1-pins` "sdmmcsdmmc-bus4@ "sdmmc-clk "sdmmc-cmd "sdmmc-det "spdif0spdif1spi0spi0m0-pins0 "spi0m0-cs0 "spi0m0-cs1 "spi1spi1m1-pins0 "spi1m1-cs0 "spi1m1-cs1 "spi2spi2m2-pins0  "spi2m2-cs0 "spi3spi3m1-pins0  "spi3m1-cs0 "spi3m1-cs1 "spi4spi4m0-pins0 "spi4m0-cs0 "spi4m0-cs1 "tsadctsadc-shut-org "uart0uart0m1-xfer  "/uart1uart1m1-xfer   "uart2uart2m0-xfer  "uart3uart3m1-xfer   "uart4uart4m1-xfer   "uart5uart5m1-xfer   "uart6uart6m1-xfer   "uart7uart7m1-xfer   "uart8uart8m1-xfer   "uart9uart9m1-xfer   "vopbt656gpio-functsadc-gpio-func "eth0gmac0gmac0-miim "gmac0-rx-bus20 "gmac0-tx-bus20 "gmac0-rgmii-clk  "gmac0-rgmii-bus@   "hym8563hym8563-int "yt6801yt6801-isolate "{yt8531yt8531-rst  "lcdlcdpwr-en "bl-en " usbusb-host-pwren "usb-otg-pwren "wifibt-pwron "wpcie-clkreq "spcie-rst "uwifi-pwron  "vpcie-wake "tusb@fc400000rockchip,rk3588-dwc3snps,dwc3@@5(ref_clksuspend_clkbus_clkUotg ]busb2-phyusb3-phy lutmi_wide4 uS| Bdisabledsyscon@fd5b8000%rockchip,rk3588-pcie3-phy-grfsyscon["syscon@fd5c0000$rockchip,rk3588-pipe-phy-grfsyscon\"syscon@fd5cc000$rockchip,rk3588-usbdpphy-grfsyscon\@"syscon@fd5d4000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd]@@+"usb2phy@4000rockchip,rk3588-usb2phy@5(phyclk usb480m_phy1unOphyapb Bdisabled"otg-port[ Bdisabled"i2s@fddc8000rockchip,rk3588-i2s-tdm܀5(mclk_txmclk_rxhclk<QmVtx4 uOtx-m Bdisabledi2s@fddf4000rockchip,rk3588-i2s-tdm@599?(mclk_txmclk_rxhclk<6QmVtx4 uOtx-m Bdisabledi2s@fddf8000rockchip,rk3588-i2s-tdm߀5++'(mclk_txmclk_rxhclk<(QmVrx4 uOrx-m Bdisabledi2s@fde00000rockchip,rk3588-i2s-tdm5&&"(mclk_txmclk_rxhclk<#QmVrx4 uOrx-m Bdisabledpcie@fe150000*rockchip,rk3588-pcierockchip,rk3568-pcie+05@E;JOt)(aclk_mstaclk_slvaclk_dbipclkauxpipepciP syspmcmsglegacyerr `3ARai] bpcie-phy4 "T @ @0 @@dbiapbconfigu&+ OpwrpipeBokay sqrlegacy-interrupt-controller "pcie-ep@fe150000rockchip,rk3588-pcie-epP @ @ @ @0dbidbi2apbaddr_spaceatu05@E;JOt)(aclk_mstaclk_slvaclk_dbipclkauxpipe + syspmcmsglegacyerrdma0dma1dma2dma3Ri] bpcie-phy4 "u&+ Opwrpipe Bdisabledpcie@fe160000*rockchip,rk3588-pcierockchip,rk3568-pcie+05AF<KPu)(aclk_mstaclk_slvaclk_dbipclkauxpipepciP syspmcmsglegacyerr `3ARai] bpcie-phy4 "T @ @@0 @@@dbiapbconfigu', OpwrpipeBokay szrlegacy-interrupt-controller "pcie@fe170000*rockchip,rk3588-pcierockchip,rk3568-pcie /05BG=LQ)(aclk_mstaclk_slvaclk_dbipclkauxpipepciP syspmcmsglegacyerr `3ARa p i] bpcie-phy4 "T @ @0 @@dbiapbconfigu(- Opwrpipe+ Bdisabledlegacy-interrupt-controller "ethernet@fe1b0000&rockchip,rk3588-gmacsnps,dwmac-4.20a  macirqeth_wake_irq(567X]40(stmmacethclk_mac_refpclk_macaclk_macptp_ref4 !u# Ostmmacethqi+Bokay output  rgmii-rxid~default ' 0Cmdiosnps,dwmac-mdio+ethernet-phy@1ethernet-phy-ieee802.3-c22default~ 9N  I sq "stmmac-axi-config"rx-queues-config/"queue0queue1tx-queues-configE"queue0queue1sata@fe220000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci"(5c`fUp(satapmaliverxoobrefasic[+Bokaysata-port@0m@] bsata-phyz  phy@fed90000rockchip,rk3588-usbdp-phy[5mW(refclkimmortalpclkutmi(uOinitcmnlanepcs_apbpma_apb - @ Q g Bdisabled"phy@fee10000rockchip,rk3588-naneng-combphy5wW (refapbpipe<L[u=DOphyapb w+ Bokay"phy@fee80000rockchip,rk3588-pcie3-phy[5y(pclkuHOphy w+ [Bokay"opp-table-cluster0operating-points-v2 l" opp-1008000000 w< ~ L L~ @opp-1200000000 wG ~ 4 4~ @opp-1416000000 wTfr ~ ~ @ opp-1608000000 w_" ~ P P~ @opp-1800000000 wkI ~~~~ @opp-table-cluster1operating-points-v2 l"opp-1200000000 wG ~ L LB@ @opp-1416000000 wTfr ~  B@ @opp-1608000000 w_" ~ B@ @opp-1800000000 wkI ~ P PB@ @opp-2016000000 wx) ~HHB@ @opp-2208000000 wh ~llB@ @opp-2400000000 w  ~B@B@B@ @opp-table-cluster2operating-points-v2 l"opp-1200000000 wG ~ L LB@ @opp-1416000000 wTfr ~  B@ @opp-1608000000 w_" ~ B@ @opp-1800000000 wkI ~ P PB@ @opp-2016000000 wx) ~HHB@ @opp-2208000000 wh ~llB@ @opp-2400000000 w  ~B@B@B@ @opp-tableoperating-points-v2"!opp-300000000 w ~ L L Popp-400000000 wׄ ~ L L Popp-500000000 we ~ L L Popp-600000000 w#F ~ L L Popp-700000000 w)' ~ ` ` Popp-800000000 w/ ~ q q Popp-900000000 w5 ~ 5 5 Popp-1000000000 w; ~ P P Panalog-soundaudio-graph-card  rk3588-es8316. MIC2Mic JackHeadphonesHPOLHeadphonesHPOR) MicrophoneMic JackHeadphoneHeadphoneschosen serial2:1500000n8avdd0v85-pcie20-regulatorregulator-fixedavdd0v85_pcie20 P P-avdd1v8-pcie20-regulatorregulator-fixedavdd1v8_pcie20w@w@- avdd0v75-pcie30-regulatorregulator-fixedavdd0v75_pcie30 q q- avdd1v8-pcie30-regulatorregulator-fixedpcie30_avdd1v8w@w@- backlightpwm-backlight qdefault~     aleds gpio-ledsled-0  status yz heartbeatvcc12v-dcin-regulatorregulator-fixed vcc12v_dcin" vcc5v0-sys-regulatorregulator-fixed vcc5v0_sysLK@LK@- "-vcc3v3-sys-regulatorregulator-fixed vcc3v3_sys2Z2Z- "rvcc3v3-lcd-regulatorregulator-fixed vcc3v3_lcd  default~-rvcc5v0-usb-host-regulatorregulator-fixed vcc5v0_host LK@LK@ default~--"*vcc5v0-usb30-otg-regulatorregulator-fixed vcc5v0_otg LK@LK@ ydefault~-- compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3spi4mmc0mmc1mmc2cpudevice_typeregenable-methodcapacity-dmips-mhzclocksassigned-clocksassigned-clock-ratescpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachedynamic-power-coefficient#cooling-cellsoperating-points-v2cpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unifiedportsarm,smc-idshmem#clock-cells#reset-cellsinterruptsclock-frequencyclock-output-namesinterrupt-namesrangesno-mapclock-namespower-domainsstatusmali-supplydr_modephysphy-namesphy_typeresetssnps,dis_enblslpm_quirksnps,dis-u1-entry-quirksnps,dis-u2-entry-quirksnps,dis-u2-freeclk-exists-quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirksnps,dis_rxdet_inp3_quirk#iommu-cellsreset-names#phy-cellsphy-supplyrockchip,grfpinctrl-0pinctrl-namesfcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspenddmasdma-namesreg-shiftreg-io-width#pwm-cells#power-domain-cellspm_qosiommusreg-namesrockchip,vop-grfrockchip,vo1-grfrockchip,pmuassigned-clock-parents#sound-dai-cellsbus-range#interrupt-cellsinterrupt-map-maskinterrupt-maplinux,pci-domainmax-link-speedmsi-mapnum-lanesreset-gpiosvpcie3v3-supplyinterrupt-controllerrockchip,php-grfsnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsosnps,blensnps,wr_osr_lmtsnps,rd_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-useports-implementedhba-port-capsnps,rx-ts-maxsnps,tx-ts-maxfifo-depthmax-frequencybus-widthcap-mmc-highspeedcap-sd-highspeeddisable-wpno-sdiono-mmcsd-uhs-sdr104vqmmc-supplymmc-hs400-1_8vmmc-hs400-enhanced-strobeno-sdnon-removablerockchip,trcm-sync-tx-onlydai-formatmclk-fsremote-endpointmbi-aliasmbi-rangesmsi-controller#msi-cellsaffinityarm,pl330-periph-burst#dma-cellsnum-csgpio-controller#gpio-cellsspi-max-frequencyvcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvcc13-supplyvcc14-supplyvcca-supplypinsfunctionregulator-enable-ramp-delayregulator-suspend-microvoltregulator-on-in-suspendpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polaritypinctrl-1#thermal-sensor-cells#io-channel-cellsvref-supplywakeup-sourcebitsrockchip,u2phy-grfrockchip,usb-grfrockchip,usbdpphy-grfrockchip,vo-grfrockchip,pipe-grfrockchip,pipe-phy-grfgpio-rangesbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsclock_in_outphy-handlephy-moderx_delaytx_delayreset-assert-usreset-deassert-usrockchip,phy-grfopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspenddaislabelroutingwidgetsstdout-pathenable-gpiospower-supplypwmscolorlinux,default-triggerenable-active-highgpio