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#address-cells#size-cellsinterrupt-parentmodelcompatibleclock-output-names#clock-cellsclock-frequencyphandleallwinner,pipelinesstatusrangesdma-noncoherentreginterruptsclocksclock-namesgpio-controllerinterrupt-controller#gpio-cells#interrupt-cellsvcc-pb-supplyvcc-pc-supplyvcc-pd-supplyvcc-pe-supplyvcc-pf-supplyvcc-pg-supplygpio-line-namespinsfunctiondrive-strength#reset-cellsresets#io-channel-cellsdmasdma-names#sound-dai-cellspinctrl-0pinctrl-namesreg-io-widthreg-shiftpagesizeread-onlyvcc-supplydma-channelsdma-requests#dma-cellsreg-namesdma-ranges#interconnect-cellsreset-namescap-sd-highspeedmax-frequencyno-mmcvmmc-supplybroken-cddisable-wpbus-widthnon-removablemmc-pwrseqcap-mmc-highspeedmmc-ddr-1_8vmmc-ddr-3_3vno-sdno-sdiovqmmc-supplycs-gpiosinterrupt-namesextconphysphy-namesdr_mode#phy-cellsusb0_id_det-gpiossysconnvmem-cellsnvmem-cell-namesphy-handlephy-moderemote-endpoint#power-domain-cellsdevice_typecpu-supplyinterrupt-affinityserial1serial3ethernet0stdout-pathregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onvin-supply#mux-control-cellsmux-gpiosidle-statereset-gpiospost-power-on-delay-mspower-off-delay-usdcxopiocan0_pinscan1_pinsclk_pg11_pindsi_4lane_pinsi2c2_pd_pinsi2c3_pg_pinsi2s1_pinsi2s1_din0_pini2s1_dout0_pinlcd_rgb666_pinsmmc0_pinsmmc1_pinsmmc2_pinsrgmii_pe_pinsrmii_pe_pinsspi0_pinsspi1_pinsspi1_hold_pinspi1_wp_pinuart1_pg6_pinsuart1_pg8_rts_cts_pinsuart3_pb_pinsccugpadcdmici2s1i2s2timerwdtuart0uart1uart2uart3uart4uart5i2c0i2c1i2c2i2c3eeprom0eth0_macaddresscan0can1reg_ldoareg_ldobdmasidcryptombusmmc0mmc1mmc2spi0spi1usb_otgusbphyehci0ohci0ehci1ohci1emacmdiolan8720adisplay_clocksmixer0mixer0_outmixer0_out_tcon_top_mixer0mixer1mixer1_outmixer1_out_tcon_top_mixer1dsidsi_in_tcon_lcd0dphytcon_toptcon_top_mixer0_intcon_top_mixer0_in_mixer0tcon_top_mixer0_outtcon_top_mixer0_out_tcon_lcd0tcon_top_mixer0_out_tcon_tv0tcon_top_mixer1_intcon_top_mixer1_in_mixer1tcon_top_mixer1_outtcon_top_mixer1_out_tcon_lcd0tcon_top_mixer1_out_tcon_tv0tcon_top_hdmi_intcon_top_hdmi_in_tcon_tv0tcon_top_hdmi_outtcon_lcd0_intcon_lcd0_in_tcon_top_mixer0tcon_lcd0_in_tcon_top_mixer1tcon_lcd0_outtcon_lcd0_out_dsitcon_tv0_intcon_tv0_in_tcon_top_mixer0tcon_tv0_in_tcon_top_mixer1tcon_tv0_outtcon_tv0_out_tcon_top_hdmippur_ccurtcdsp_wdtcpu0cpu1gicreg_vcc3v3reg_vcc_coreusb0_sec_muxwifi_pwrseq