8(CompuLab CM-QS600#!qcom,apq8064-cm-qs600qcom,apq8064,reserved-memory=smem@80000000D HO wcnss@8f000000DpHOXcpuscpu@0 !qcom,kraitWqcom,kpss-acc-v1ecpuDqObcpu@1 !qcom,kraitWqcom,kpss-acc-v1ecpuDqOdcpu@2 !qcom,kraitWqcom,kpss-acc-v1ecpuDq Ofcpu@3 !qcom,kraitWqcom,kpss-acc-v1ecpuDq  Ohl2-cache!cacheOidle-statescpu-spc#!qcom,idle-state-spcarm,idle-state Omemory@0ememoryDthermal-zonescpu0-thermal $tripstrip01$=lpassivetrip11= lcriticalcpu1-thermal $ltripstrip01$=lpassivetrip11= lcriticalcpu2-thermal $tripstrip01$=lpassivetrip11= lcriticalcpu3-thermal $ltripstrip01$=lpassivetrip11= lcriticalcpu-pmu!qcom,krait-pmu H clockscxo_board !fixed-clockS`$O/pxo_board !fixed-clockS`Osleep_clk !fixed-clockS`Osmem !qcom,smemp ~smsm !qcom,smsm    @apps@0DOZmodem@1D H&q6@2D HYwcnss@3D HOWdsps@4D Hfirmwarescm!qcom,scm-apq8064qcom,scm corereplicator !arm,coresight-static-replicator apb_pclkin-portsportendpointOaout-portsport@0DendpointO[port@1DendpointO\soc= !simple-buspinctrl@800000!qcom,apq8064-pinctrlD@"Z. H:defaultHOsdcc1-default-stateOIclk-pins Rsdc1_clkWfcmd-pins Rsdc1_cmdW sdata-pins Rsdc1_dataW ssdcc3-default-stateclk-pins Rsdc3_clkWfcmd-pins Rsdc3_cmdWsdata-pins Rsdc3_dataWssdc4-default-state*Rgpio63gpio64gpio65gpio66gpio67gpio68sdc4OGgsbi1-uart-2pins-stateRgpio18gpio19gsbi1gsbi1-uart-4pins-stateRgpio18gpio19gpio20gpio21gsbi1gsbi4-uart-pin-active-stateO!rx-pinsRgpio11gsbi4Wftx-pinsRgpio10gsbi4Wfgsbi6-uart-2pins-stateRgpio14gpio15gsbi6gsbi6-uart-4pins-stateRgpio14gpio15gpio16gpio17gsbi6gsbi7-uart-2pins-stateRgpio82gpio83gsbi7O(gsbi7_uart_4pins-stateRgpio82gpio83gpio84gpio85gsbi7i2c1-default-stateRgpio20gpio21gsbi1WfOi2c1-sleep-stateRgpio20gpio21gpioWfOi2c2-default-stateRgpio24gpio25gsbi2WfOi2c2-sleep-stateRgpio24gpio25gpioWfOi2c3-default-state Rgpio8gpio9gsbi3WfOi2c3-sleep-state Rgpio8gpio9gpioWfO i2c4-default-stateRgpio12gpio13gsbi4WfO"i2c4-sleep-stateRgpio12gpio13gpioWfO#i2c6-default-stateRgpio16gpio17gsbi6WfO&i2c6-sleep-stateRgpio16gpio17gpioWfO'i2c7-default-stateRgpio84gpio85gsbi7WfO)i2c7-sleep-stateRgpio84gpio85gpioWfO*spi5-default-stateO$spi5-pinsRgpio51gpio52gpio54gsbi5Wfspi5-cs-pinsRgpio53gpioWfspi5-sleep-stateO%spi5-pinsRgpio51gpio52gpio53gpio54gpioWriva-fm-active-stateRgpio14gpio15riva_fmriva-bt-active-stateRgpio16gpio17riva_btriva-wlan-active-state#Rgpio64gpio65gpio66gpio67gpio68 riva_wlanWhdmi-pinctrl-stateOTddc-pinsRgpio70gpio71hdmisWhpd-pinsRgpio72hdmiWps-hold-default-stateRgpio78ps_holdOcard-detect-stateRgpio26gpiofOEpcie-stateRgpio27gpioW fOShwmutex@1200600!qcom,sfpb-mutexD Ointerrupt-controller@2000000!qcom,msm-qgic2D Otimer@200a0005!qcom,kpss-wdt-apq8064qcom,kpss-timerqcom,msm-timer$HD`sleepclock-controller@2088000!qcom,kpss-acc-v1D pll8_votepxo acpu0_auxSOclock-controller@2098000!qcom,kpss-acc-v1D  pll8_votepxo acpu1_auxSOclock-controller@20a8000!qcom,kpss-acc-v1D  pll8_votepxo acpu2_auxSOclock-controller@20b8000!qcom,kpss-acc-v1D  pll8_votepxo acpu3_auxSO power-manager@2089000%!qcom,apq8064-saw2-v1.1-cpuqcom,saw2DOregulator P power-manager@2099000%!qcom,apq8064-saw2-v1.1-cpuqcom,saw2D Oregulator P power-manager@20a9000%!qcom,apq8064-saw2-v1.1-cpuqcom,saw2D O regulator P power-manager@20b9000%!qcom,apq8064-saw2-v1.1-cpuqcom,saw2D O regulator P sps-sic-non-secure@12100000!sysconDOgsbi@12440000okay!qcom,gsbi-v1.0.0DDiface=serial@12450000%!qcom,msm-uartdm-v1.3qcom,msm-uartdmDE@ H coreiface disabledi2c@12460000!qcom,i2c-qup-v1.1.1H(:defaultsleepDF H coreifaceokay` @eeprom@50 !atmel,24c02DP2 gsbi@12480000 disabled!qcom,gsbi-v1.0.0DHiface=i2c@124a0000!qcom,i2c-qup-v1.1.1DJH(:defaultsleep H coreiface disabledgsbi@16200000 disabled!qcom,gsbi-v1.0.0D iface=i2c@16280000!qcom,i2c-qup-v1.1.1H( :defaultsleepD( H coreiface disabledgsbi@16300000 disabled!qcom,gsbi-v1.0.0D0iface=serial@16340000%!qcom,msm-uartdm-v1.3qcom,msm-uartdmD40 HH!:default coreiface disabledi2c@16380000!qcom,i2c-qup-v1.1.1H"(#:defaultsleepD8 H coreiface disabledgsbi@1a200000 disabled!qcom,gsbi-v1.0.0D iface=serial@1a240000%!qcom,msm-uartdm-v1.3qcom,msm-uartdmD$  H coreiface disabledspi@1a280000!qcom,spi-qup-v1.1.1D( HH$(%:defaultsleep coreiface disabledgsbi@16500000 disabled!qcom,gsbi-v1.0.0DPiface=serial@16540000%!qcom,msm-uartdm-v1.3qcom,msm-uartdmDTP H coreiface disabledi2c@16580000!qcom,i2c-qup-v1.1.1H&(':defaultsleepDX H coreiface disabledgsbi@16600000okay!qcom,gsbi-v1.0.0D`iface=serial@16640000%!qcom,msm-uartdm-v1.3qcom,msm-uartdmDd` H coreifaceokay:defaultH(i2c@16680000!qcom,i2c-qup-v1.1.1H)(*:defaultsleepDh H coreiface disabledrng@1a500000 !qcom,prngDPcoressbi@c00000 !qcom,ssbiD ;pmic-arbiterpmic !qcom,pm8821 PLmpps@50!qcom,pm8821-mppqcom,ssbi-mppDP."+O+ssbi@500000 !qcom,ssbiDP ;pmic-arbiterpmic !qcom,pm8921 PJO,pwrkey@1c!qcom,pm8921-pwrkeyDP,2,3d= xmpps@50!qcom,pm8921-mppqcom,ssbi-mppDP."- O-rtc@11d!qcom,pm8921-rtcD P,'mkeypad@148!qcom,pm8921-keypadDHP,J,Kd| el disabledgpio@150 !qcom,pm8921-gpioqcom,ssbi-gpioDP".,.O.wlan-gpios-stateOkpinconfRgpio43normalfxoadc@197!qcom,pm8921-adcD P,NOjadc-channel@0Dadc-channel@1Dadc-channel@2Dadc-channel@4Dadc-channel@8Dadc-channel@9D adc-channel@aD adc-channel@bD adc-channel@cD adc-channel@dD adc-channel@eDadc-channel@fDefuse@700000 !qcom,apq8064-qfpromqcom,qfpromDpcalib@404DO1backup_calib@414DO2clock-controller@900000!qcom,gcc-apq8064sysconD@S/0 cxopxopll4Othermal-sensor!qcom,msm8960-tsens12calibcalib_backup Huplow O clock-controller@28000000!qcom,lcc-apq8064D(S$pxopll4_votemi2s_codec_clkcodec_i2s_mic_codec_clkspare_i2s_mic_codec_clkcodec_i2s_spkr_codec_clkspare_i2s_spkr_codec_clkpcm_codec_clkO0clock-controller@4000000!qcom,mmcc-apq8064DS 833445Cpxopll3pll8_votedsi1plldsi1pllbytedsi2plldsi2pllbytehdmipllOLclock-controller@2011000+!qcom,kpss-gcc-apq8064qcom,kpss-gccsysconD pll8_votepxoSOrpm@108000!qcom,rpm-apq8064D !$Hackerrwakeupclock-controller!qcom,rpmcc-apq8064qcom,rpmccS/pxocxoOregulators!qcom,rpm-pm8921-regulators*6>7N6b6{77888s1((0O7s3B@\I>OQs4w@w@0O6s7  0O8l3.2ZO;l4B@w@O<l5)0-OKl23O?lvs6ORusb@12500000 !qcom,ci-hdrcDPP Hd~ coreiface@!core-ulpi6G9Lusb-phyokayVotgO:ulpiphy(!qcom,usb-hs-phy-apq8064qcom,usb-hs-phy/ sleepref:!por^i;u<O9usb@12520000 !qcom,ci-hdrcDRR H)' coreiface)d!core-ulpi6G=Lusb-phyokayVhostO>ulpiphy(!qcom,usb-hs-phy-apq8064qcom,usb-hs-phy^/ sleepref>!pori;u?O=usb@12530000 !qcom,ci-hdrcDSS H,* coreiface,e!core-ulpi6G@Lusb-phyokayVhostOAulpiphy(!qcom,usb-hs-phy-apq8064qcom,usb-hs-phy^/ sleeprefA!pori;u?O@phy@1b400000!qcom,apq8064-sata-phy disabledD@-cfg^OBsata@29000000!qcom,apq8064-ahcigeneric-ahci disabledD) H(;.%slave_ifaceifacecorerxoobpmaliveGB Lsata-phymmc@12180000!arm,pl18xarm,primecellokayD  Hfzpmclkapb_pclk qCCtxrxD:defaultHE  dma-controller@12182000!qcom,bam-v1.3.0D  H`pbam_clkOCmmc@121c0000!arm,pl18xarm,primecellokayD  He{qmclkapb_pclklFFtxrx:defaultHGD%D2Hdma-controller@121c2000!qcom,bam-v1.3.0D  H_qbam_clkOFmmc@12400000okay!arm,pl18xarm,primecell:defaultHID@  Hhxnmclkapb_pclk=JJtxrxK%6dma-controller@12402000!qcom,bam-v1.3.0D@  Hbnbam_clkOJsyscon@1a400000!qcom,tcsr-apq8064sysconD@Ogpu@4300000!qcom,adreno-320.2qcom,adrenoD0Kkgsl_3d0_reg_memory HP kgsl_3d0_irqcoreifacememmem_iface LGLL!LUMMMMMMMMMM M M M M MMMMMMMMMMMMMMMMMMNNNNNNNNNN N N N N NNNNNNNNNNNNNNNNNN\Oopp-table!operating-points-v2OOopp-450000000ptopp-27000000psyscon@5700000!sysconDppOPdsi@4700000)!qcom,apq8064-dsi-ctrlqcom,mdss-dsi-ctrl HRDp Kdsi_ctrl8LLLL9LTLjLX(ifacebuscore_mmsssrcbytepixelcore LSLWL8Li w3333PG3 disabledportsport@0Dendpointport@1Dendpointphy@4700200!qcom,dsi-phy-28nm-8960S^Dppp\"Kdsi_plldsi_phydsi_phy_regulator ifaceref L disabledO3dsi@5800000!qcom,mdss-dsi-ctrl HD Kdsi_ctrl8L LLLRLVLPLZ(ifacebuscore_mmsssrcbytepixelcore LULYLQLO w4444PG4 disabledportsport@0Dendpointport@1Dendpointdsi-phy@5800200!qcom,dsi-phy-28nm-8960D\"Kdsi_plldsi_phydsi_phy_regulator ifaceref L S^ disabledO4iommu@7500000!qcom,apq8064-iommusmmu_pclkiommu_clkL LDPH?@OUiommu@7600000!qcom,apq8064-iommusmmu_pclkiommu_clkL LD`H=>OViommu@7c00000!qcom,apq8064-iommusmmu_pclkiommu_clkL L!DHEFOMiommu@7d00000!qcom,apq8064-iommusmmu_pclkiommu_clkL L!DHONpcie@1b500000!qcom,pcie-apq8064 DPP `Kdbielbiparfconfigepci0= Hmsi$%&'+.-coreifacephy(lkjih!axiahbporpciphyokayQRDHS:default %pcie@0epciD=hdmi-tx@4a00000!qcom,hdmi-tx-8960:defaultHTDKcore_physical HOL>L Lcoremaster_ifaceslave_ifaceG5 disabledportsport@0Dendpointport@1Dendpointphy@4a00400!qcom,hdmi-phy-8960D`Khdmi_phyhdmi_pllL slave_iface^S disabledO5display-controller@5100000 !qcom,mdp4D HK0LMLLLNL_L`3core_clkiface_clkbus_clklut_clkhdmi_clktv_clk UUUVVportsport@0Dendpointport@1Dendpointport@2Dendpointport@3Dendpointriva-pil@3200800!qcom,riva-pilD   @ KccudxepmuPW wdogfatalpX disabledOYiris !qcom,wcn3660/xosmd-edge H !1?rivawcnss !qcom,wcnss EWCNSS_CTRLWYbluetooth!qcom,wcnss-btwifi!qcom,wcnss-wlanHtxrxaZ Z rtx-enabletx-rings-emptyetb@1a01000"!arm,coresight-etb10arm,primecellD apb_pclkin-portsportendpoint[Otpiu@1a03000!!arm,coresight-tpiuarm,primecellD0 apb_pclkin-portsportendpoint\Ofunnel@1a04000+!arm,coresight-dynamic-funnelarm,primecellD@ apb_pclkin-portsport@0Dendpoint]Ocport@1Dendpoint^Oeport@4Dendpoint_Ogport@5Dendpoint`Oiout-portsportendpointaOetm@1a1c000"!arm,coresight-etm3xarm,primecellD apb_pclkbout-portsportendpointcO]etm@1a1d000"!arm,coresight-etm3xarm,primecellD apb_pclkdout-portsportendpointeO^etm@1a1e000"!arm,coresight-etm3xarm,primecellD apb_pclkfout-portsportendpointgO_etm@1a1f000"!arm,coresight-etm3xarm,primecellD apb_pclkhout-portsportendpointiO`iio-hwmon !iio-hwmonTjjjj j j jaliases#/soc/gsbi@16600000/serial@16640000chosenserial0:115200n8pwrseq-sdcc4:defaultHk!mmc-pwrseq-simple .+OHregulator-v3p3!regulator-fixed PCIE V3P32Z2ZOD #address-cells#size-cellsmodelcompatibleinterrupt-parentrangesregno-mapphandleenable-methoddevice_typenext-level-cacheqcom,accqcom,sawcpu-idle-statescache-levelcache-unifiedentry-latency-usexit-latency-usmin-residency-uspolling-delay-passivepolling-delaythermal-sensorscoefficientstemperaturehysteresisinterrupts#clock-cellsclock-frequencymemory-regionhwlocksqcom,ipc-1qcom,ipc-2qcom,ipc-3qcom,ipc-4#qcom,smem-state-cellsinterrupt-controller#interrupt-cellsclocksclock-namesremote-endpointgpio-controllergpio-ranges#gpio-cellspinctrl-namespinctrl-0pinsdrive-strengthbias-disablebias-pull-upfunctionoutput-highbias-pull-down#hwlock-cellscpu-offsetclock-output-namesregulator-min-microvoltregulator-max-microvoltstatuscell-indexsyscon-tcsrqcom,modepinctrl-1pagesizeqcom,controller-typeinterrupts-extendeddebounceallow-set-timescan-delayrow-holdpower-source#io-channel-cells#reset-cellsnvmem-cellsnvmem-cell-namesinterrupt-names#qcom,sensors#thermal-sensor-cells#power-domain-cellsqcom,ipcvin_lvs1_3_6-supplyvin_lvs2-supplyvin_lvs4_5_7-supplyvdd_l1_l2_l12_l18-supplyvdd_l24-supplyvdd_l25-supplyvdd_l26-supplyvdd_l27-supplyvdd_l28-supplyregulator-always-onqcom,switch-mode-frequencyassigned-clocksassigned-clock-ratesresetsreset-namesphy_typeahb-burst-configphysphy-namesdr_mode#phy-cellsv3p3-supplyv1p8-supplyports-implementedarm,primecell-periphidbus-widthcap-sd-highspeedcap-mmc-highspeedmax-frequencyno-1-8-vdmasdma-namesvmmc-supplycd-gpios#dma-cellsqcom,eevqmmc-supplymmc-pwrseqnon-removablereg-namesiommusoperating-points-v2opp-hzassigned-clock-parentssyscon-sfpb#iommu-cellsqcom,ncblinux,pci-domainbus-rangenum-lanesinterrupt-map-maskinterrupt-mapvdda-supplyvdda_phy-supplyvdda_refclk-supplyperst-gpiosqcom,smd-edgelabelqcom,smd-channelsqcom,mmioqcom,smem-statesqcom,smem-state-namescpuio-channelsserial0stdout-pathreset-gpiosregulator-name