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X1P42100 CRD 2qcom,x1p42100-crdqcom,x1p42100chosen=serial0:115200n8clocksxo-board 2fixed-clockI“àYf’sleep-clk 2fixed-clockIüYf)bi-tcxo-div2-clk2fixed-factor-clockYnu€f(bi-tcxo-ao-div2-clk2fixed-factor-clockYnu€fcpus cpu@0Šcpu 2qcom,oryon–špsci¨ ¹ Çpsciperffl2-cache2cacheÚæfcpu@100Šcpu 2qcom,oryon–špsci¨ ¹ Çpsciperffcpu@200Šcpu 2qcom,oryon–špsci¨ ¹ Çpsciperffcpu@300Šcpu 2qcom,oryon–špsci¨ ¹ Çpsciperffcpu@10000Šcpu 2qcom,oryon–špsci¨  ¹  Çpsciperffl2-cache2cacheÚæf cpu@10100Šcpu 2qcom,oryon–špsci¨  ¹  Çpsciperffcpu@10200Šcpu 2qcom,oryon–špsci¨  ¹  Çpsciperffcpu@10300Šcpu 2qcom,oryon–špsci¨  ¹  Çpsciperffcpu-mapcluster0core0ôcore1ôcore2ôcore3ôcluster1core0ôcore1ôcore2ôcore3ôidle-statesøpscicpu-sleep-02arm,idle-stateret,´=@MXfdomain-idle-statescluster-sleep-02domain-idle-stateD,^=ôM Äf!cluster-sleep-12domain-idle-stateT,˜= MXf"dummy-sink2arm,coresight-dummy-sinkin-portsportendpoint^fNfirmwarescm2qcom,scm-x1e80100qcom,scmn|�fÚscmi 2arm,scmiŒ“txrxž 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2qcom,cmd-db–�Æfäaop-config@81c80000–�Èfåtme-crash-dump@81ca0000–�Êfætme-log@81ce0000–�Î@fçuefi-log@81ce4000–�Î@fèsecdata-apss@81cff000–�Ïðfépdp-ns-shared@81e00000–�àfêgpu-prr@81f00000–�ðfëtpm-control@81f10000–�ñfìusb-ucsi-shared@81f20000–�òfípld-pep@81f30000–�ó`fîpld-gmu@81f36000–�ó`fïpld-pdp@81f37000–�ópfðtz-stat@82700000–‚pfñxbl-tmp-buffer@82800000–‚€Àfòadsp-rpc-remote-heap@84b00000–„°€fóspu-secure-shared-memory@85300000–…0fôadsp-boot-dtb@866c0000–†lfõspss-region@86700000–†p@föadsp-boot@86b00000–†°Àf÷video@87700000–‡ppfadspslpi@87e00000–‡à fÒq6-adsp-dtb@8b800000–‹€fÓcdsp@8b900000–‹�fžq6-cdsp-dtb@8d900000–��fŸgpu-microcode@8d9fe000–�Ÿà fÌcvp@8da00000–� pføcamera@8e100000–Ž€fùav1-encoder@8e900000–Ž�pfúreserved-region@8f000000–� wpss@8fa00000–� �fûq6-wpss-dtb@91300000–‘0füxbl-sc@d8000000–Øfýreserved-region@d8040000–Ø qtee@d80e0000–ØRfþta@d8600000–Ø` fÿtags@e1000000–ájfllcc-lpi@ff800000–ÿ€`fsmem@ffe00000 2qcom,smem–ÿà $flinux,cma2shared-dma-poolopp-table-qup100mhz2operating-points-v2f@opp-750000000xhÀ7%opp-1000000000õá7&opp-table-qup120mhz2operating-points-v2f9opp-750000000xhÀ7%opp-1200000000'7&smp2p-adsp 2qcom,smp2pE' Œ'Y»­crmaster-kernel‚master-kernel’fÔslave-kernel ‚slave-kernel©¾fÐsmp2p-cdsp 2qcom,smp2pE' Œ'Y^°crmaster-kernel‚master-kernel’f slave-kernel ‚slave-kernel©¾fœsoc@0 2simple-bus Ïúfclock-controller@100000$2qcom,x1p42100-gccqcom,x1e80100-gcc– ¬n()*+,-./0¹1YÚ¤f3mailbox@4080002qcom,x1e80100-ipccqcom,ipcc–@€ Ü婾çf'dma-controller@800000*2qcom,x1e80100-gpi-dmaqcom,sm6350-gpi-dma–€�Üó > 26 #disabledf7geniqup@8c00002qcom,geni-se-qup–Œ n3ä3å *m-ahbs-ahb 2# ú#okayfi2c@8800002qcom,geni-i2c–ˆ@ Ü(n3Î*seHn44566qup-corequp-configqup-memory¹17% I77NtxrxX8bdefault  #disabledfspi@8800002qcom,geni-spi–ˆ@ Ü(n3Î*seHn44566qup-corequp-configqup-memory¹1p9 I77NtxrxX:;bdefault  #disabledfi2c@8840002qcom,geni-i2c–ˆ@@ Ü)n3Ð*seHn44566qup-corequp-configqup-memory¹17% I77NtxrxX<bdefault  #disabledfspi@8840002qcom,geni-spi–ˆ@@ Ü)n3Ð*seHn44566qup-corequp-configqup-memory¹1p9 I77NtxrxX=>bdefault  #disabledfi2c@8880002qcom,geni-i2c–ˆ€@ Ü*n3Ò*seHn44566qup-corequp-configqup-memory¹17% I77NtxrxX?bdefault  #disabledf spi@8880002qcom,geni-spi–ˆ€@ Ü*n3Ò*seHn44566qup-corequp-configqup-memory¹1p@ I77NtxrxXABbdefault  #disabledf i2c@88c0002qcom,geni-i2c–ˆÀ@ Ü+n3Õ*seHn44566qup-corequp-configqup-memory¹17% I77NtxrxXCbdefault  #disabledf spi@88c0002qcom,geni-spi–ˆÀ@ Ü+n3Õ*seHn44566qup-corequp-configqup-memory¹1p@ I77NtxrxXDEbdefault  #disabledf i2c@8900002qcom,geni-i2c–‰@ Ü,n3Ø*seHn44566qup-corequp-configqup-memory¹17% I77NtxrxXFbdefault  #disabledf spi@8900002qcom,geni-spi–‰@ Ü,n3Ø*seHn44566qup-corequp-configqup-memory¹1p@ I77NtxrxXGHbdefault  #disabledfi2c@8940002qcom,geni-i2c–‰@@ Ü-n3Ú*seHn44566qup-corequp-configqup-memory¹17% I77NtxrxXIbdefault  #disabledfspi@8940002qcom,geni-spi–‰@@ Ü-n3Ú*seHn44566qup-corequp-configqup-memory¹1p@ I77NtxrxXJKbdefault  #disabledfserial@8940002qcom,geni-debug-uart–‰@@ Ü-n3Ú*se0n44566qup-corequp-config¹1p@XLbdefault#okayfi2c@8980002qcom,geni-i2c–‰€@ ÜÍn3Ü*seHn44566qup-corequp-configqup-memory¹17% I77NtxrxXMbdefault  #disabledfspi@8980002qcom,geni-spi–‰€@ ÜÍn3Ü*seHn44566qup-corequp-configqup-memory¹1p@ I77NtxrxXNObdefault  #disabledfi2c@89c0002qcom,geni-i2c–‰À@ ÜÎn3Þ*seHn44566qup-corequp-configqup-memory¹17% I77NtxrxXPbdefault  #disabledfspi@89c0002qcom,geni-spi–‰À@ ÜÎn3Þ*seHn44566qup-corequp-configqup-memory¹1p@ I77NtxrxXQRbdefault  #disabledfdma-controller@a00000*2qcom,x1e80100-gpi-dmaqcom,sm6350-gpi-dma– �Ü     ó > 26 #disabledfTgeniqup@ac00002qcom,geni-se-qup–¬ n3â3ã *m-ahbs-ahb 2# ú#okayfi2c@a800002qcom,geni-i2c–¨@ Ü n3¸*seHn4456S6qup-corequp-configqup-memory¹17% ITTNtxrxXUbdefault #okayI€ftouchscreen@10 2hid-over-i2c–„ EV3“WžXXYbdefaultspi@a800002qcom,geni-spi–¨@ Ü n3¸*seHn4456S6qup-corequp-configqup-memory¹1p9 ITTNtxrxXZ[bdefault  #disabledfi2c@a840002qcom,geni-i2c–¨@@ Ü!n3º*seHn4456S6qup-corequp-configqup-memory¹17% ITTNtxrxX\bdefault  #disabledfspi@a840002qcom,geni-spi–¨@@ Ü!n3º*seHn4456S6qup-corequp-configqup-memory¹1p9 ITTNtxrxX]^bdefault  #disabledfi2c@a880002qcom,geni-i2c–¨€@ Ü"n3¼*seHn4456S6qup-corequp-configqup-memory¹17% ITTNtxrxX_bdefault  #disabledfspi@a880002qcom,geni-spi–¨€@ Ü"n3¼*seHn4456S6qup-corequp-configqup-memory¹1p@ ITTNtxrxX`abdefault  #disabledfi2c@a8c0002qcom,geni-i2c–¨À@ Ü#n3¿*seHn4456S6qup-corequp-configqup-memory¹17% ITTNtxrxXbbdefault  #disabledfspi@a8c0002qcom,geni-spi–¨À@ Ü#n3¿*seHn4456S6qup-corequp-configqup-memory¹1p@ ITTNtxrxXcdbdefault  #disabledfi2c@a900002qcom,geni-i2c–©@ Ü$n3Â*seHn4456S6qup-corequp-configqup-memory¹17% ITTNtxrxXebdefault  #disabledfspi@a900002qcom,geni-spi–©@ Ü$n3Â*seHn4456S6qup-corequp-configqup-memory¹1p@ ITTNtxrxXfgbdefault  #disabledf i2c@a940002qcom,geni-i2c–©@@ Ü%n3Ä*seHn4456S6qup-corequp-configqup-memory¹17% ITTNtxrxXhbdefault  #disabledf!spi@a940002qcom,geni-spi–©@@ Ü%n3Ä*seHn4456S6qup-corequp-configqup-memory¹1p@ ITTNtxrxXijbdefault  #disabledf"i2c@a980002qcom,geni-i2c–©€@ Ü&n3Æ*seHn4456S6qup-corequp-configqup-memory¹17% ITTNtxrxXkbdefault  #disabledf#spi@a980002qcom,geni-spi–©€@ Ü&n3Æ*seHn4456S6qup-corequp-configqup-memory¹1p@ ITTNtxrxXlmbdefault  #disabledf$serial@a980002qcom,geni-uart–©€@ Ü&n3Æ*se0n44566qup-corequp-config¹1p@Xnbdefault #disabledf%i2c@a9c0002qcom,geni-i2c–©À@ Ü'n3È*seHn4456S6qup-corequp-configqup-memory¹17% ITTNtxrxXobdefault  #disabledf&spi@a9c0002qcom,geni-spi–©À@ Ü'n3È*seHn4456S6qup-corequp-configqup-memory¹1p@ ITTNtxrxXpqbdefault  #disabledf'dma-controller@b00000*2qcom,x1e80100-gpi-dmaqcom,sm6350-gpi-dma–°�ÜLMNOPQRSTUVWó > 2V #disabledfrgeniqup@bc00002qcom,geni-se-qup–¼ n3à3á *m-ahbs-ahb 2C ú#okayf(i2c@b800002qcom,geni-i2c–¸@ Üun3¢*seHn44566qup-corequp-configqup-memory¹17% IrrNtxrxXsbdefault #okayI€f)touchpad@15 2hid-over-i2c–„ EV“WžtXubdefaultªkeyboard@3a 2hid-over-i2c–:„ EVC“WžtXvbdefaultªspi@b800002qcom,geni-spi–¸@ Üun3¢*seHn44566qup-corequp-configqup-memory¹1p9 IrrNtxrxXwxbdefault  #disabledf*i2c@b840002qcom,geni-i2c–¸@@ ÜGn3¤*seHn44566qup-corequp-configqup-memory¹17% IrrNtxrxXybdefault #okayI€f+typec-mux@82parade,ps8830–n“z¸{Å{Özãzð| ýV¹X}bdefault ports port@0–endpoint^~fÀport@1–endpoint^f¶port@2–endpoint^€fÁspi@b840002qcom,geni-spi–¸@@ ÜGn3¤*seHn44566qup-corequp-configqup-memory¹1p9 IrrNtxrxX�‚bdefault  #disabledf,i2c@b880002qcom,geni-i2c–¸€@ ÜHn3¦*seHn44566qup-corequp-configqup-memory¹17% IrrNtxrxXƒbdefault  #disabledf-serial@b880002qcom,geni-uart–¸€@ ÜHn3¦*se0n44566qup-corequp-config¹1p@X„bdefault #disabledf.spi@b880002qcom,geni-spi–¸€@ ÜHn3¦*seHn44566qup-corequp-configqup-memory¹1p@ IrrNtxrxX…†bdefault  #disabledf/i2c@b8c0002qcom,geni-i2c–¸À@ ÜIn3©*seHn44566qup-corequp-configqup-memory¹17% IrrNtxrxX‡bdefault #okayI€f0typec-mux@82parade,ps8830–n “ˆ¸‰ʼnÖˆãˆðŠ ý‹ XŒbdefault ports port@0–endpoint^�fºport@1–endpoint^Žf­port@2–endpoint^�f»spi@b8c0002qcom,geni-spi–¸À@ ÜIn3©*seHn44566qup-corequp-configqup-memory¹1p@ IrrNtxrxX�‘bdefault  #disabledf1i2c@b900002qcom,geni-i2c–¹@ ÜJn3¬*seHn44566qup-corequp-configqup-memory¹17% IrrNtxrxX’bdefault  #disabledf2spi@b900002qcom,geni-spi–¹@ ÜJn3¬*seHn44566qup-corequp-configqup-memory¹1p@ IrrNtxrxX“”bdefault  #disabledf3i2c@b940002qcom,geni-i2c–¹@@ ÜKn3®*seHn44566qup-corequp-configqup-memory¹17% IrrNtxrxX•bdefault #okayI€f4redriver@4f 2nxp,ptn3222–O+–9— ýV¸X˜bdefaultGfìspi@b940002qcom,geni-spi–¹@@ ÜKn3®*seHn44566qup-corequp-configqup-memory¹1p@ IrrNtxrxX™šbdefault  #disabledf5i2c@b980002qcom,geni-i2c–¹€@ ÜÍn3°*seHn44566qup-corequp-configqup-memory¹17% IrrNtxrxX›bdefault  #disabledf6spi@b980002qcom,geni-spi–¹€@ ÜÍn3°*seHn44566qup-corequp-configqup-memory¹1p@ IrrNtxrxXœ�bdefault  #disabledf7i2c@b9c0002qcom,geni-i2c–¹À@ ÜÎn3²*seHn44566qup-corequp-configqup-memory¹17% IrrNtxrxXžbdefault #okayI€f8typec-mux@82parade,ps8830–n“Ÿ¸ Å ÖŸãŸð¡ ýV°X¢bdefault ports port@0–endpoint^£f½port@1–endpoint^¤f²port@2–endpoint^¥f¾spi@b9c0002qcom,geni-spi–¹À@ ÜÎn3²*seHn44566qup-corequp-configqup-memory¹1p@ IrrNtxrxX¦§bdefault  #disabledf9thermal-sensor@c271000"2qcom,x1e80100-tsensqcom,tsens-v2 – ' " E¨�Ruplowcriticalbpf¡thermal-sensor@c272000"2qcom,x1e80100-tsensqcom,tsens-v2 – '  "0E¨‚Ruplowcriticalbpf¢thermal-sensor@c273000"2qcom,x1e80100-tsensqcom,tsens-v2 – '0 "@E¨ƒRuplowcriticalbpf£thermal-sensor@c274000"2qcom,x1e80100-tsensqcom,tsens-v2 – '@ "PE¨Ruplowcriticalbp #disabledf:phy@fd300082qcom,x1e80100-snps-eusb2-phyqcom,sm8550-snps-eusb2-phy–ý0TGn*ref†36#okay“©�ª›«føphy@fd50002qcom,x1e80100-qmp-usb3-dp-phy–ýP@ n333*auxrefcom_auxusb3_pipe¹3†3D3O  phycommonYG¬ #okay¸ªȬf.ports port@0–endpoint^­fŽport@1–endpoint^®fúport@2–endpoint^¯fphy@fd900082qcom,x1e80100-snps-eusb2-phyqcom,sm8550-snps-eusb2-phy–ý�TGn*ref†37#okay“©�ª›°fûphy@fda0002qcom,x1e80100-qmp-usb3-dp-phy–ý @ n3 3"3#*auxrefcom_auxusb3_pipe¹3†3E3P  phycommonYG¬ #okay¸ªȱf/ports port@0–endpoint^²f¤port@1–endpoint^³fýport@2–endpoint^´fphy@fde00082qcom,x1e80100-snps-eusb2-phyqcom,sm8550-snps-eusb2-phy–ýàTGn*ref†38#okay“©�ª›µfïphy@fdf0002qcom,x1e80100-qmp-usb3-dp-phy–ýð@ n3$3&3'*auxrefcom_auxusb3_pipe¹3†3F3Q  phycommonYG¬ #okay¸ªȱf0ports port@0–endpoint^¶fport@1–endpoint^·fñport@2–endpoint^¸frng@10c30002qcom,x1e80100-trngqcom,trng– 0f;interconnect@15000002qcom,x1e80100-cnoc-main–PD̸fºinterconnect@16000002qcom,x1e80100-cnoc-cfg–`f̸f6interconnect@16800002qcom,x1e80100-system-noc–hÀ€Ì¸f<interconnect@16c00002qcom,x1e80100-pcie-south-anoc–lЀ̸f½interconnect@16d00002qcom,x1e80100-pcie-center-anoc–mp̸f=interconnect@16e00002qcom,x1e80100-aggre1-noc–nD̸fSinterconnect@17000002qcom,x1e80100-aggre2-noc–pÄ̸finterconnect@17400002qcom,x1e80100-pcie-north-anoc–t�€Ì¸f¹interconnect@17500002qcom,x1e80100-usb-center-anoc–uˆÌ¸f>interconnect@17600002qcom,x1e80100-usb-north-anoc–vp€Ì¸fòinterconnect@17700002qcom,x1e80100-usb-south-anoc–wð€Ì¸fîinterconnect@17800002qcom,x1e80100-mmss-noc–x¸Ì¸fpcie@1bd0000“¼ 3€Špci2qcom,pcie-x1e80100`–½0x x@¨xx½0Øparfdbielbiatuconfigmhi Túx x0x0Ð@@@âÿìù lÜž¦DŸÈÚÛy/Rmsi0msi1msi2msi3msi4msi5msi6msi7global¾ 'ÜÝíî8n3T3V3W3^3_33!<*auxcfgbus_masterbus_slaveslave_q2anoc_aggrcnoc_sf_axi53TE$ø0n¹5º 6pcie-memcpu-pcie†33 pcilink_down¹3ZUUUUUUUUUUUUUUUUjUUUUUUUUp» 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Ûfhnvram@71002qcom,spmi-sdam–q  úqfireboot-reason@48–H îfjnvram@7e002qcom,spmi-sdam–~  ú~fkcharge-limit-en@73–sf¶charge-limit-end@75–uf·charge-limit-delta@76–vf¸gpio@8800!2qcom,pmk8550-gpioqcom,spmi-gpio–¸ì ü©¾fpwm2qcom,pmk8550-pwm ó #disabledflpmic@12qcom,pm8550qcom,spmi-pmic– fmtemp-alarm@a002qcom,spmi-temp-alarm– Ü pf©gpio@8800 2qcom,pm8550-gpioqcom,spmi-gpio–ˆì ‹ ü©¾f‹kypd-vol-up-n-state gpio6 normal þ  bfµrtmr0-reset-n-active-state gpio10 normal þ ;  &fŒusb0-3p3-reg-en-state gpio11 normal þ ;  &fÒled-controller@ee00*2qcom,pm8550-flash-ledqcom,spmi-flash-led–î #disabledfnpwm!2qcom,pm8550-pwmqcom,pm8350c-pwm ó #disabledfopmic@22qcom,pm8550qcom,spmi-pmic– fptemp-alarm@a002qcom,spmi-temp-alarm– Ü pfªgpio@8800"2qcom,pm8550ve-gpioqcom,spmi-gpio–ˆì  ü©¾f pmic@32qcom,pmc8380qcom,spmi-pmic– fqtemp-alarm@a002qcom,spmi-temp-alarm– Ü pf«gpio@8800!2qcom,pmc8380-gpioqcom,spmi-gpio–ˆì  ü©¾fedp-bl-en-state gpio4 normal þ  &fpmic@42qcom,pmc8380qcom,spmi-pmic– frtemp-alarm@a002qcom,spmi-temp-alarm– Ü pf¬gpio@8800!2qcom,pmc8380-gpioqcom,spmi-gpio–ˆì ! ü©¾f!pmic@52qcom,pmc8380qcom,spmi-pmic– fstemp-alarm@a002qcom,spmi-temp-alarm– Ü pf­gpio@8800!2qcom,pmc8380-gpioqcom,spmi-gpio–ˆì " ü©¾f"usb0-pwr-1p15-reg-en-state gpio8 normal þ ;  &fÐpmic@82qcom,pm8550qcom,spmi-pmic– fttemp-alarm@a002qcom,spmi-temp-alarm– Ü pf®gpio@8800"2qcom,pm8550ve-gpioqcom,spmi-gpio–ˆì #ü©¾f#misc-3p3-reg-en-state gpio6 normal ;  & 4 þ DfÎpmic@92qcom,pm8550qcom,spmi-pmic–  futemp-alarm@a002qcom,spmi-temp-alarm– Ü pf¯gpio@8800"2qcom,pm8550ve-gpioqcom,spmi-gpio–ˆì $ü©¾f$usb0-1p8-reg-en-state gpio8 normal þ ;  &fÑpmic@c2qcom,pm8010qcom,spmi-pmic–   #disabledfvtemp-alarm@24002qcom,spmi-temp-alarm–$Ü $pf°spmi@c432000 – C @ M Øcnfgintr Rperiph_irq E¨©¾ fwpmic@72qcom,smb2360qcom,spmi-pmic– #okayfxphy@fd002qcom,smb2360-eusb2-repeater–ýG X% e&f«pmic@a2qcom,smb2360qcom,spmi-pmic–  #okayfyphy@fd002qcom,smb2360-eusb2-repeater–ýG X% e'f°pmic@b2qcom,smb2360qcom,spmi-pmic–  #okayfzphy@fd002qcom,smb2360-eusb2-repeater–ýG X% e(fµpmic@c2qcom,smb2360qcom,spmi-pmic–   #disabledf{phy@fd002qcom,smb2360-eusb2-repeater–ýGf|pinctrl@f1000002qcom,x1e80100-tlmm–ð ÜÐìü©¾ Vï q¨ ",îfVedp0-hpd-default-state gpio119 edp0_hot ;fqup-i2c0-data-clk-state gpio0gpio1 qup0_se0 " ˜fsqup-i2c1-data-clk-state gpio4gpio5 qup0_se1 " ˜fyqup-i2c2-data-clk-state gpio8gpio9 qup0_se2 " ˜fƒqup-i2c3-data-clk-state gpio12gpio13 qup0_se3 " ˜f‡qup-i2c4-data-clk-state gpio16gpio17 qup0_se4 " ˜f’qup-i2c5-data-clk-state gpio20gpio21 qup0_se5 " ˜f•qup-i2c6-data-clk-state gpio24gpio25 qup0_se6 " ˜f›qup-i2c7-data-clk-state gpio14gpio15 qup0_se7 " ˜fžqup-i2c8-data-clk-state gpio32gpio33 qup1_se0 " ˜fUqup-i2c9-data-clk-state gpio36gpio37 qup1_se1 " ˜f\qup-i2c10-data-clk-state gpio40gpio41 qup1_se2 " ˜f_qup-i2c11-data-clk-state gpio44gpio45 qup1_se3 " ˜fbqup-i2c12-data-clk-state gpio48gpio49 qup1_se4 " ˜fequp-i2c13-data-clk-state gpio52gpio53 qup1_se5 " ˜fhqup-i2c14-data-clk-state gpio56gpio57 qup1_se6 " ˜fkqup-i2c15-data-clk-state gpio54gpio55 qup1_se7 " ˜foqup-i2c16-data-clk-state gpio64gpio65 qup2_se0 " ˜f8qup-i2c17-data-clk-state gpio68gpio69 qup2_se1 " ˜f<qup-i2c18-data-clk-state gpio72gpio73 qup2_se2 " ˜f?qup-i2c19-data-clk-state gpio76gpio77 qup2_se3 " ˜fCqup-i2c20-data-clk-state gpio80gpio81 qup2_se4 " ˜fFqup-i2c21-data-clk-state gpio84gpio85 qup2_se5 " ˜fIqup-i2c22-data-clk-state gpio88gpio89 qup2_se6 " ˜fMqup-i2c23-data-clk-state gpio86gpio87 qup2_se7 " ˜fPqup-spi0-cs-state gpio3 qup0_se0 " ;fxqup-spi0-data-clk-state gpio0gpio1gpio2 qup0_se0 " ;fwqup-spi1-cs-state gpio7 qup0_se1 " ;f‚qup-spi1-data-clk-state gpio4gpio5gpio6 qup0_se1 " ;f�qup-spi2-cs-state gpio11 qup0_se2 " ;f†qup-spi2-data-clk-state gpio8gpio9gpio10 qup0_se2 " ;f…qup-spi3-cs-state gpio15 qup0_se3 " ;f‘qup-spi3-data-clk-state gpio12gpio13gpio14 qup0_se3 " ;f�qup-spi4-cs-state gpio19 qup0_se4 " ;f”qup-spi4-data-clk-state gpio16gpio17gpio18 qup0_se4 " ;f“qup-spi5-cs-state gpio23 qup0_se5 " ;fšqup-spi5-data-clk-state gpio20gpio21gpio22 qup0_se5 " ;f™qup-spi6-cs-state gpio27 qup0_se6 " ;f�qup-spi6-data-clk-state gpio24gpio25gpio26 qup0_se6 " ;fœqup-spi7-cs-state gpio13 qup0_se7 " ;f§qup-spi7-data-clk-state gpio14gpio15gpio12 qup0_se7 " ;f¦qup-spi8-cs-state gpio35 qup1_se0 " ;f[qup-spi8-data-clk-state gpio32gpio33gpio34 qup1_se0 " ;fZqup-spi9-cs-state gpio39 qup1_se1 " ;f^qup-spi9-data-clk-state gpio36gpio37gpio38 qup1_se1 " ;f]qup-spi10-cs-state gpio43 qup1_se2 " ;faqup-spi10-data-clk-state gpio40gpio41gpio42 qup1_se2 " ;f`qup-spi11-cs-state gpio47 qup1_se3 " ;fdqup-spi11-data-clk-state gpio44gpio45gpio46 qup1_se3 " ;fcqup-spi12-cs-state gpio51 qup1_se4 " ;fgqup-spi12-data-clk-state gpio48gpio49gpio50 qup1_se4 " ;ffqup-spi13-cs-state gpio55 qup1_se5 " ;fjqup-spi13-data-clk-state gpio52gpio53gpio54 qup1_se5 " ;fiqup-spi14-cs-state gpio59 qup1_se6 " ;fmqup-spi14-data-clk-state gpio56gpio57gpio58 qup1_se6 " ;flqup-spi15-cs-state gpio53 qup1_se7 " ;fqqup-spi15-data-clk-state gpio54gpio55gpio52 qup1_se7 " ;fpqup-spi16-cs-state gpio67 qup2_se0 " ;f;qup-spi16-data-clk-state gpio64gpio65gpio66 qup2_se0 " ;f:qup-spi17-cs-state gpio71 qup2_se1 " ;f>qup-spi17-data-clk-state gpio68gpio69gpio70 qup2_se1 " ;f=qup-spi18-cs-state gpio75 qup2_se2 " ;fBqup-spi18-data-clk-state gpio72gpio73gpio74 qup2_se2 " ;fAqup-spi19-cs-state gpio79 qup2_se3 " ;fEqup-spi19-data-clk-state gpio76gpio77gpio78 qup2_se3 " ;fDqup-spi20-cs-state gpio83 qup2_se4 " ;fHqup-spi20-data-clk-state gpio80gpio81gpio82 qup2_se4 " ;fGqup-spi21-cs-state gpio87 qup2_se5 " ;fKqup-spi21-data-clk-state gpio84gpio85gpio86 qup2_se5 " ;fJqup-spi22-cs-state gpio91 qup2_se6 " ;fOqup-spi22-data-clk-state gpio88gpio89gpio90 qup2_se6 " ;fNqup-spi23-cs-state gpio85 qup2_se7 " ;fRqup-spi23-data-clk-state gpio86gpio87gpio84 qup2_se7 " ;fQqup-uart2-default-statef„cts-pins gpio8 qup0_se2 " ;rts-pins gpio9 qup0_se2 " ;tx-pins gpio10 qup0_se2 " ;rx-pins gpio11 qup0_se2 " ;qup-uart14-default-statefncts-pins gpio56 qup1_se6 Hrts-pins gpio57 qup1_se6 " ;tx-pins gpio58 qup1_se6 " ;rx-pins gpio59 qup1_se6 qup-uart21-default-statefLtx-pins gpio86 qup2_se5 " ;rx-pins gpio87 qup2_se5 " ;sdc2-default-statef}clk-pins sdc2_clk " ;cmd-pins sdc2_cmd "  data-pins sdc2_data "  sdc2-sleep-statef~clk-pins sdc2_clk " ;cmd-pins sdc2_cmd " data-pins sdc2_data " edp-reg-en-state gpio70 gpio " ;fÍeusb6-reset-n-state gpio184 gpio " ; of˜hall-int-n-state gpio92 gpio ;f´kybd-default-state gpio67 gpio ;fvnvme-reg-en-state gpio18 gpio " ;fÏpcie4-default-statefÆclkreq-n-pins gpio147 pcie4_clk " perst-n-pins gpio146 gpio " ;wake-n-pins gpio148 gpio " pcie5-default-statefÃclkreq-n-pins gpio150 pcie5_clk " perst-n-pins gpio149 gpio " ;wake-n-pins gpio151 gpio " pcie6a-default-statefÀclkreq-n-pins gpio153 pcie6a_clk " perst-n-pins gpio152 gpio " ;wake-n-pins gpio154 gpio " rtmr1-reset-n-active-state gpio176 gpio " ;f¢rtmr2-reset-n-active-state gpio185 gpio " ;f}tpad-default-state gpio3 gpio ;futs0-default-statefYint-n-pins gpio51 gpio ;reset-n-pins gpio48 gpio V "usb1-pwr-1p15-reg-en-state gpio188 gpio " ;fÓusb1-pwr-1p8-reg-en-state gpio175 gpio " ;fÔusb1-pwr-3p3-reg-en-state gpio186 gpio " ;fÕusb2-pwr-1p15-reg-en-state gpio189 gpio " ;fÖusb2-pwr-1p8-reg-en-state gpio126 gpio " ;f×usb2-pwr-3p3-reg-en-state gpio187 gpio " ;fØwcd-reset-n-active-state gpio191 gpio " ; of±wwan-sw-en-state gpio221 gpio " ;fÙstm@10002000 2arm,coresight-stmarm,primecell – (Østm-basestm-stimulus-basenÎ *apb_pclkout-portsportendpoint^)f0tpdm@10003000"2qcom,coresight-tpdmarm,primecell–0nÎ *apb_pclk ”  ª  #disabledout-portsportendpoint^*f+tpda@10004000"2qcom,coresight-tpdaarm,primecell–@nÎ *apb_pclkin-ports port@0–endpoint^+f*port@1–endpoint^,f.out-portsportendpoint^-f/tpdm@1000f000"2qcom,coresight-tpdmarm,primecell–ðnÎ *apb_pclk ”  ª out-portsportendpoint^.f,funnel@10041000+2arm,coresight-dynamic-funnelarm,primecell–nÎ *apb_pclkin-ports port@6–endpoint^/f-port@7–endpoint^0f)out-portsportendpoint^1f6funnel@10042000+2arm,coresight-dynamic-funnelarm,primecell– nÎ *apb_pclkin-ports port@2–endpoint^2f|port@5–endpoint^3fFport@6–endpoint^4fnout-portsportendpoint^5f7funnel@10045000+2arm,coresight-dynamic-funnelarm,primecell–PnÎ *apb_pclkin-ports port@0–endpoint^6f1port@1–endpoint^7f5out-portsportendpoint^8fItpdm@10800000"2qcom,coresight-tpdmarm,primecell–€nÎ *apb_pclk ”@ ª out-portsportendpoint^9frtpdm@1082c000"2qcom,coresight-tpdmarm,primecell–‚ÀnÎ *apb_pclk ¼  Ò out-portsportendpoint^:fgtpdm@10841000"2qcom,coresight-tpdmarm,primecell–„nÎ *apb_pclk ”  ª out-portsportendpoint^;fetpdm@10844000"2qcom,coresight-tpdmarm,primecell–„@nÎ *apb_pclk ¼  Ò out-portsportendpoint^<f=funnel@10846000+2arm,coresight-dynamic-funnelarm,primecell–„`nÎ *apb_pclkin-portsportendpoint^=f<out-portsportendpoint^>fdcti@1098b000 2arm,coresight-ctiarm,primecell–˜°nÎ *apb_pclktpdm@109d0000"2qcom,coresight-tpdmarm,primecell–�nÎ *apb_pclk ¼  Ò  #disabledout-portsportendpoint^?fftpdm@10ac0000"2qcom,coresight-tpdmarm,primecell–¬nÎ *apb_pclk ¼  Ò  #disabledout-portsportendpoint^@fBtpdm@10ac1000"2qcom,coresight-tpdmarm,primecell–¬nÎ *apb_pclk ”@ ª out-portsportendpoint^AfCtpda@10ac4000"2qcom,coresight-tpdaarm,primecell–¬@nÎ *apb_pclkin-ports port@8–endpoint^Bf@port@9– endpoint^CfAout-portsportendpoint^DfEfunnel@10ac5000+2arm,coresight-dynamic-funnelarm,primecell–¬PnÎ *apb_pclkin-portsportendpoint^EfDout-portsportendpoint^Ff3funnel@10b04000+2arm,coresight-dynamic-funnelarm,primecell–°@nÎ *apb_pclkin-ports port@3–endpoint^Gf^port@6–endpoint^HfTport@7–endpoint^If8out-portsportendpoint^JfKtmc@10b05000 2arm,coresight-tmcarm,primecell–°PnÎ *apb_pclkfin-portsportendpoint^KfJout-portsportendpoint^LfMreplicator@10b06000/2arm,coresight-dynamic-replicatorarm,primecell–°`nÎ *apb_pclkin-portsportendpoint^MfLout-portsportendpoint^Nftpda@10b08000"2qcom,coresight-tpdaarm,primecell–°€nÎ *apb_pclkin-ports port@0–endpoint^OfUport@1–endpoint^PfVport@2–endpoint^QfWport@3–endpoint^RfXport@4–endpoint^SfYout-portsportendpoint^TfHtpdm@10b09000"2qcom,coresight-tpdmarm,primecell–°�nÎ *apb_pclk ”@ ª out-portsportendpoint^UfOtpdm@10b0a000"2qcom,coresight-tpdmarm,primecell–° nÎ *apb_pclk ”@ ª out-portsportendpoint^VfPtpdm@10b0b000"2qcom,coresight-tpdmarm,primecell–°°nÎ *apb_pclk ”@ ª out-portsportendpoint^WfQtpdm@10b0c000"2qcom,coresight-tpdmarm,primecell–°ÀnÎ *apb_pclk ”@ ª out-portsportendpoint^XfRtpdm@10b0d000"2qcom,coresight-tpdmarm,primecell–°ÐnÎ *apb_pclk ¼  Ò out-portsportendpoint^YfStpdm@10b20000"2qcom,coresight-tpdmarm,primecell–²nÎ *apb_pclk ¼  Ò  #disabledout-portsportendpoint^Zf[tpda@10b23000"2qcom,coresight-tpdaarm,primecell–²0nÎ *apb_pclk #disabledin-portsportendpoint^[fZout-portsportendpoint^\f]funnel@10b24000+2arm,coresight-dynamic-funnelarm,primecell–²@nÎ *apb_pclk #disabledin-portsportendpoint^]f\out-portsportendpoint^^fGtpdm@10c08000"2qcom,coresight-tpdmarm,primecell–À€nÎ *apb_pclk ¼  Ò out-portsportendpoint^_f`funnel@10c0b000+2arm,coresight-dynamic-funnelarm,primecell–À°nÎ *apb_pclkin-ports port@4–endpoint^`f_out-portsportendpoint^afqtpdm@10c28000"2qcom,coresight-tpdmarm,primecell–€nÎ *apb_pclk ¼  Ò out-portsportendpoint^bfhtpdm@10c29000"2qcom,coresight-tpdmarm,primecell–Â�nÎ *apb_pclk ”@ ª out-portsportendpoint^cfitpda@10c2b000"2qcom,coresight-tpdaarm,primecell–°nÎ *apb_pclkin-ports port@4–endpoint^df>port@13–endpoint^ef;port@14–endpoint^ff?port@15–endpoint^gf:port@1a–endpoint^hfbport@1b–endpoint^ifcout-portsportendpoint^jfkfunnel@10c2c000+2arm,coresight-dynamic-funnelarm,primecell–ÂÀnÎ *apb_pclkin-ports port@0–endpoint^kfjport@4–endpoint^lfwport@5–endpoint^mf~out-portsportendpoint^nf4tpdm@10c38000"2qcom,coresight-tpdmarm,primecell–ÀnÎ *apb_pclk ”@ ª out-portsportendpoint^ofstpdm@10c39000"2qcom,coresight-tpdmarm,primecell–Ã�nÎ *apb_pclk ”@ ª out-portsportendpoint^pfttpda@10c3c000"2qcom,coresight-tpdaarm,primecell–ÃÀnÎ *apb_pclkin-ports port@4–endpoint^qfaport@f–endpoint^rf9port@10–endpoint^sfoport@11–endpoint^tfpout-portsportendpoint^ufvfunnel@10c3d000+2arm,coresight-dynamic-funnelarm,primecell–ÃÐnÎ *apb_pclkin-portsportendpoint^vfuout-portsportendpoint^wfltpdm@10cc1000"2qcom,coresight-tpdmarm,primecell–ÌnÎ *apb_pclk ”@ ª  ¼  Ò  #disabledout-portsportendpoint^xfytpda@10cc4000"2qcom,coresight-tpdaarm,primecell–Ì@nÎ *apb_pclkin-ports port@2–endpoint^yfxout-portsportendpoint^zf{funnel@10cc5000+2arm,coresight-dynamic-funnelarm,primecell–ÌPnÎ *apb_pclkin-portsportendpoint^{fzout-portsportendpoint^|f2funnel@10d04000+2arm,coresight-dynamic-funnelarm,primecell–Ð@nÎ *apb_pclkin-ports port@6–endpoint^}f‘out-portsportendpoint^~fmtpdm@10d08000"2qcom,coresight-tpdmarm,primecell–ЀnÎ *apb_pclk ”  ª out-portsportendpoint^f‡tpdm@10d09000"2qcom,coresight-tpdmarm,primecell–Ð�nÎ *apb_pclk ”  ª out-portsportendpoint^€fˆtpdm@10d0a000"2qcom,coresight-tpdmarm,primecell–РnÎ *apb_pclk ”  ª out-portsportendpoint^�f‰tpdm@10d0b000"2qcom,coresight-tpdmarm,primecell–аnÎ *apb_pclk ”  ª out-portsportendpoint^‚fŠtpdm@10d0c000"2qcom,coresight-tpdmarm,primecell–ÐÀnÎ *apb_pclk ”  ª out-portsportendpoint^ƒf‹tpdm@10d0d000"2qcom,coresight-tpdmarm,primecell–ÐÐnÎ *apb_pclk ”  ª out-portsportendpoint^„fŒtpdm@10d0e000"2qcom,coresight-tpdmarm,primecell–ÐànÎ *apb_pclk ”  ª out-portsportendpoint^…f�tpdm@10d0f000"2qcom,coresight-tpdmarm,primecell–ÐðnÎ *apb_pclk ”  ª out-portsportendpoint^†fŽtpda@10d12000"2qcom,coresight-tpdaarm,primecell–Ñ nÎ *apb_pclkin-ports port@0–endpoint^‡fport@1–endpoint^ˆf€port@2–endpoint^‰f�port@3–endpoint^Šf‚port@4–endpoint^‹fƒport@5–endpoint^Œf„port@6–endpoint^�f…port@7–endpoint^Žf†out-portsportendpoint^�f�funnel@10d13000+2arm,coresight-dynamic-funnelarm,primecell–Ñ0nÎ *apb_pclkin-portsportendpoint^�f�out-portsportendpoint^‘f}iommu@1500000012qcom,x1e80100-smmu-500qcom,smmu-500arm,mmu-500–ŒÜAabcdefghijklmnopqrstuvµ¶·¸¹º»¼½¾¿À;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXY‹Œ�Ž��‘’“”•–—˜™¢£œ¥Ã§¨©²³´µ¶·¸¹¥²ìf2iommu@15400000 2arm,smmu-v3–@¥$ÜŠ†ˆReventqgerrorcmdq-syncì#okayvedf€interrupt-controller@17000000 2arm,gic-v3 –0 Ü ¾© ä û úfmsi-controller@170400002arm,gic-v3-its–  f¼watchdog@17410000%2qcom,apss-wdt-x1e80100qcom,kpss-wdt–An) Ü#okayvedf�mailbox@174300002qcom,x1e80100-cpucp-mbox –Cƒ Üçfrsc@175000002qcom,rpmh-rsc0–PQRØdrv-0drv-1drv-2$Ü *  : F ìapps_rsc¹#f‚bcm-voter2qcom,bcm-voterfclock-controller2qcom,x1e80100-rpmh-clkn’*xoYfpower-controller2qcom,x1e80100-rpmhpdp“¤f1opp-table2operating-points-v2f“opp-16‰fƒopp-48‰0fèopp-52‰4f„opp-56‰8fopp-60‰<f…opp-64‰@f%opp-80‰Pf†opp-128‰€f&opp-144‰�f‡opp-192‰Àféopp-256‰f¾opp-320‰@f opp-336‰Pfˆopp-384‰€fopp-416‰ f‰regulators-02qcom,pm8550-rpmh-regulators Vb c” s” ƒ• ˜– ®– À— Ñ– ☠ñ• —bob1 vreg_bob1 -æ 6opp-1{qä@opp-2{’|opp-3{ÄÇopp-4{ãÈ€opp-5{`@pmu@240b6400*2qcom,x1e80100-cpu-bwmonqcom,sdm845-bwmon–$ d ÜEn55 p›system-cache-controller@250000002qcom,x1e80100-llcc –% % %@ %` %€ %  %À %à & & „Øllcc0_basellcc1_basellcc2_basellcc3_basellcc4_basellcc5_basellcc6_basellcc7_basellcc_broadcast_basellcc_broadcast_and_base Ü remoteproc@323000002qcom,x1e80100-cdsp-pas–20@EBœœœœ#Rwdogfatalreadyhandoverstop-ackn*xo¹11 1  Çcxmxcnspn�\žŸœÎÅ Östop#okay2jqcom/x1e80100/cdsp.mbnqcom/x1e80100/cdsp_dtb.mbnfžglink-edgeE' Œ'ìcdsprfastrpc 2qcom,fastrpcòfastrpcglink-apps-dspìcdsp compute-cb@12qcom,fastrpc-compute-cb– 2  ìcompute-cb@22qcom,fastrpc-compute-cb– 2  ìcompute-cb@32qcom,fastrpc-compute-cb– 2  ìcompute-cb@42qcom,fastrpc-compute-cb– 2  ìcompute-cb@52qcom,fastrpc-compute-cb– 2  ìcompute-cb@62qcom,fastrpc-compute-cb– 2  ìcompute-cb@72qcom,fastrpc-compute-cb– 2  ìcompute-cb@82qcom,fastrpc-compute-cb– 2  ìcompute-cb@102qcom,fastrpc-compute-cb–  2 ìcompute-cb@112qcom,fastrpc-compute-cb–  2 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/soc@0/pmu@240b5400/opp-table1/soc@0/remoteproc@323000001-/soc@0/phy@1bd4000117/thermal-zones/gpuss-0-thermal/trips/trip-point011E/thermal-zones/gpuss-1-thermal/trips/trip-point011S/thermal-zones/gpuss-2-thermal/trips/trip-point011a/thermal-zones/gpuss-3-thermal/trips/trip-point0 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interrupt-parent#address-cells#size-cellsmodelcompatiblestdout-pathclock-frequency#clock-cellsphandleclocksclock-multclock-divdevice_typeregenable-methodnext-level-cachepower-domainspower-domain-namescache-levelcache-unifiedcpuentry-methodidle-state-namearm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-usremote-endpointinterconnectsqcom,dload-modemboxesmbox-namesshmem#power-domain-cells#interconnect-cellsqcom,bcm-votersinterruptsdomain-idle-statesrangesno-maphwlockssizereusablelinux,cma-defaultopp-hzrequired-oppsinterrupts-extendedqcom,smemqcom,local-pidqcom,remote-pidqcom,entry-name#qcom,smem-state-cellsinterrupt-controller#interrupt-cellsdma-ranges#reset-cells#mbox-cellsdma-channelsdma-channel-mask#dma-cellsiommusstatusclock-namesinterconnect-namesdmasdma-namespinctrl-0pinctrl-namesoperating-points-v2hid-descr-addrvdd-supplyvddl-supplywakeup-sourcevdd33-supplyvdd33-cap-supplyvddar-supplyvddat-supplyvddio-supplyreset-gpiosorientation-switchretimer-switchvdd1v8-supplyvdd3v3-supply#phy-cellsinterrupt-names#qcom,sensors#thermal-sensor-cellsresetsvdda12-supplyphysreset-namesmode-switchvdda-phy-supplyvdda-pll-supplyreg-namesbus-rangedma-coherentlinux,pci-domainnum-lanesinterrupt-map-maskinterrupt-mapassigned-clocksassigned-clock-rateseq-presets-8gtseq-presets-16gtsopp-peak-kBpsopp-levelmsi-mapvddpe-3v3-supplywake-gpiosqcom,4ln-config-selclock-output-namesqcom,eeqcom,controlled-remotelynum-channelsqcom,num-ees#hwlock-cellsqcom,gmu#cooling-cellsnvmem-cellsnvmem-cell-namesmemory-regionfirmware-nameqcom,opp-acd-levelopp-supported-hwqcom,qmp#iommu-cells#global-interruptsqcom,smem-statesqcom,smem-state-nameslabelqcom,glink-channelsqcom,non-secure-domainqcom,domainqcom,intents#sound-dai-cellsqcom,protection-domainsound-name-prefixqcom,din-portsqcom,dout-portsqcom,ports-sintervalqcom,ports-offset1qcom,ports-offset2qcom,ports-hstartqcom,ports-hstopqcom,ports-word-lengthqcom,ports-block-pack-modeqcom,ports-block-group-countqcom,ports-lane-controlvdd-1p8-supplyvdd-io-supplyqcom,port-mappingqcom,rx-port-mappingqcom,ports-sinterval-lowqcom,tx-port-mappingvdd-micb-supplyqcom,dmic-sample-rategpio-controller#gpio-cellsgpio-rangespinsfunctiondrive-strengthslew-ratebias-disablebias-bus-holdoutput-highinput-enableoutput-lowqcom,dll-configqcom,ddr-configbus-widthphy-namessnps,dis_u2_susphy_quirksnps,dis_enblslpm_quirksnps,usb3_lpm_capablesnps,dis-u1-entry-quirksnps,dis-u2-entry-quirkdr_modeqcom,select-utmi-as-pipe-clkmaximum-speedassigned-clock-parentsdata-laneslink-frequenciesenable-gpiospower-supplyqcom,pdc-rangesqcom,channellinux,codeqcom,no-alarmqcom,uefi-rtc-infobits#pwm-cellspower-sourcebias-pull-upinput-disableoutput-enabledrive-push-pullqcom,drive-strengthvdd18-supplyvdd3-supplywakeup-parentgpio-reserved-rangesqcom,cmb-element-bitsqcom,cmb-msrs-numqcom,dsb-element-bitsqcom,dsb-msrs-num#redistributor-regionsredistributor-stridemsi-controller#msi-cellsqcom,tcs-offsetqcom,drv-idqcom,tcs-configqcom,pmic-idvdd-bob1-supplyvdd-bob2-supplyvdd-l1-l4-l10-supplyvdd-l2-l13-l14-supplyvdd-l5-l16-supplyvdd-l6-l7-supplyvdd-l8-l9-supplyvdd-l12-supplyvdd-l15-supplyvdd-l17-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-initial-moderegulator-always-onvdd-l1-supplyvdd-l2-supplyvdd-l3-supplyvdd-s4-supplyvdd-s1-supplyvdd-s2-supplyvdd-s5-supplyframe-numberthermal-sensorstemperaturehysteresispolling-delay-passivetripcooling-deviceserial0qcom,micbias1-microvoltqcom,micbias2-microvoltqcom,micbias3-microvoltqcom,micbias4-microvoltqcom,mbhc-buttons-vthreshold-microvoltqcom,mbhc-headset-vthreshold-microvoltqcom,mbhc-headphone-vthreshold-microvoltqcom,rx-deviceqcom,tx-devicevdd-buck-supplyvdd-rxtx-supplyvdd-mic-bias-supplylinux,input-typewakeup-event-actionorientation-gpiospower-roledata-roleaudio-routinglink-namesound-daigpioenable-active-highregulator-boot-onxo_boardsleep_clkbi_tcxo_div2bi_tcxo_ao_div2cpu0l2_0cpu1cpu2cpu3cpu4l2_1cpu5cpu6cpu7cluster_c4cluster_cl4cluster_cl5eud_inscmscmi_dvfsclk_virtmc_virtcpu_pd0cpu_pd1cpu_pd2cpu_pd3cpu_pd4cpu_pd5cpu_pd6cpu_pd7cluster_pd0cluster_pd1system_pdgunyah_hyp_memhyp_elf_package_memncc_memcpucp_log_memcpucp_memtags_memxbl_dtlog_memxbl_ramdump_memaop_image_memaop_cmd_db_memaop_config_memtme_crash_dump_memtme_log_memuefi_log_memsecdata_apss_mempdp_ns_shared_memgpu_prr_memtpm_control_memusb_ucsi_shared_mempld_pep_mempld_gmu_mempld_pdp_memtz_stat_memxbl_tmp_buffer_memadsp_rpc_remote_heap_memspu_secure_shared_memory_memadsp_boot_dtb_memspss_region_memadsp_boot_memvideo_memadspslpi_memq6_adsp_dtb_memcdsp_memq6_cdsp_dtb_memgpu_microcode_memcvp_memcamera_memav1_encoder_memwpss_memq6_wpss_dtb_memxbl_sc_memqtee_memta_memtags_mem1llcc_lpi_memsmem_memqup_opp_table_100mhzqup_opp_table_120mhzsmp2p_adsp_outsmp2p_adsp_insmp2p_cdsp_outsmp2p_cdsp_insocgccipccgpi_dma2qupv3_2i2c16spi16i2c17spi17i2c18spi18i2c19spi19i2c20spi20i2c21spi21uart21i2c22spi22i2c23spi23gpi_dma1qupv3_1i2c8spi8i2c9spi9i2c10spi10i2c11spi11i2c12spi12i2c13spi13i2c14spi14uart14i2c15spi15gpi_dma0qupv3_0i2c0spi0i2c1reti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