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/:pl_250mtl_26mtl_96mtl_32kperi_26mperi_mem[` D{{{{ R e|ÿÿ o+} ~pcie-phy”9¢:©macxokaypdefault~~interrupt-controller+}{spi@1132c000(mediatek,mt8188-normediatek,mt8186-nor¡2À3#X33 :spisfaxi#X[9+ xdisabledt-phy@11c20700.mediatek,mt8188-tphymediatek,generic-tphy-v3âÂ+”9xokaypcie-phy@0¡3#Ä:ref ˆ}}hdmi-phy@11d5f0002mediatek,mt8188-hdmi-phymediatek,mt8195-hdmi-phy¡Õð3$:pll_ref hdmi_txpll  ˆ “  ¢ xdisabled}­dsi-phy@11c800000mediatek,mt8188-mipi-txmediatek,mt8183-mipi-tx¡È38 mipi_tx0_pll  ˆxokay}¡dsi-phy@11c900000mediatek,mt8188-mipi-txmediatek,mt8183-mipi-tx¡É38 mipi_tx0_pll  ˆ xdisabled}¤i2c@11e00000mediatek,mt8188-i2c ¡à"€[˜ )3$7 :maindma+xokaypdefault~€³€i2c@11e01000mediatek,mt8188-i2c ¡à"€€[” )3$7 :maindma+xokaypdefault~�³€clock-controller@11e02000mediatek,mt8188-imp-iic-wrap-w¡à  }t-phy@11e30000.mediatek,mt8188-tphymediatek,generic-tphy-v3+âãxokayusb-phy@0¡3#Ê" :refda_ref ˆxokay}tt-phy@11e40000.mediatek,mt8188-tphymediatek,generic-tphy-v3+âäxokayusb-phy@0¡3#Æ" :refda_ref ˆxokay}Gusb-phy@700¡ 3"8 :refda_ref ˆxokay}Ht-phy@11e80000.mediatek,mt8188-tphymediatek,generic-tphy-v3+âèxokayusb-phy@0¡3#Ì" :refda_ref ˆxokay}ri2c@11ec0000mediatek,mt8188-i2c ¡ì"€€[• )3‚$7 :maindma+ xdisabledi2c@11ec1000mediatek,mt8188-i2c ¡ì"€[– )3‚$7 :maindma+ xdisabledclock-controller@11ec2000 mediatek,mt8188-imp-iic-wrap-en¡ì  }‚efuse@11f20000,mediatek,mt8188-efusemediatek,mt8186-efuse¡ò+dp-calib@1a0¡  }®lvts1-calib@1ac¡¬@}Dgpu-speedbin@581¡� ´}„socinfo-data1@7a0¡ socinfo-data2@7e0¡àgpu@13000000)mediatek,mt8370-maliarm,mali-valhall-jm¡@3ƒ0[~} ijobmmugpuí„ ùspeed-bin ¹…”99 Ícore0core1cxokay à!}clock-controller@13fbf000mediatek,mt8188-mfgcfg¡ûð }ƒsyscon@14000000mediatek,mt8188-vppsys0syscon¡ }&dma-controller@14001000mediatek,mt8188-mdp3-rdma¡ ì3&<dž †††† ÷‡€”9 þˆ   *‰display@140020000mediatek,mt8188-mdp3-fgmediatek,mt8195-mdp3-fg¡ 3& þˆ display@140040002mediatek,mt8188-mdp3-hdrmediatek,mt8195-mdp3-hdr¡@3&" þˆ@display@140050002mediatek,mt8188-mdp3-aalmediatek,mt8195-mdp3-aal¡P[F3& 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compatibleinterrupt-parent#address-cells#size-cellsmodeldp-intf0dp-intf1dpi1dsc0ethdr0gce0gce1merge0merge1merge2merge3merge4merge5mutex0mutex1padding0padding1padding2padding3padding4padding5padding6padding7vdo1-rdma0vdo1-rdma1vdo1-rdma2vdo1-rdma3vdo1-rdma4vdo1-rdma5vdo1-rdma6vdo1-rdma7dsi0ethernet0i2c0i2c1i2c2i2c3i2c4i2c5i2c6mmc0mmc1mmc2rtc0rtc1serial0device_typeregenable-methodclock-frequencycapacity-dmips-mhzcpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheperformance-domains#cooling-cellscpu-supplyphandlecpuentry-methodarm,psci-suspend-paramlocal-timer-stopentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unified#clock-cellsclock-output-namesopp-sharedopp-hzopp-microvoltopp-supported-hwinterruptsmediatek,platformstatuspolling-delaypolling-delay-passivethermal-sensorstemperaturehysteresistripcooling-devicedma-ranges#performance-domain-cells#interrupt-cells#redistributor-regionsinterrupt-controlleraffinity#reset-cellsreg-namesgpio-controller#gpio-cellsgpio-rangespinmuxbias-pull-downinput-enabledrive-strengthbias-pull-upoutput-highinput-disablebias-disabledrive-strength-microampoutput-low#power-domain-cellsdomain-supplyclocksclock-namesmediatek,infracfgmediatek,disable-extrstpinctrl-namespinctrl-0#sound-dai-cellsinterrupts-extended#io-channel-cellsmediatek,mic-type-0mediatek,mic-type-1regulator-nameregulator-min-microvoltregulator-max-microvoltregulator-enable-ramp-delayregulator-always-onregulator-ramp-delayregulator-allowed-modesregulator-boot-onregulator-coupled-withregulator-coupled-max-spreadmediatek,long-press-modepower-off-time-seclinux,keycodeswakeup-sourceassigned-clocksassigned-clock-parentsregulator-on-in-suspendregulator-suspend-microvolt#iommu-cells#mbox-cellsmemory-regionpower-domainsresetsreset-namesmediatek,topckgenmboxesmbox-namesmediatek,pad-selectnvmem-cellsnvmem-cell-names#thermal-sensor-cells#pwm-cellsphysmediatek,syscon-wakeupdr_modevusb33-supplyvbus-supplyinterrupt-namesmediatek,pericfgsnps,axi-configsnps,mtl-rx-configsnps,mtl-tx-configsnps,txpblsnps,rxpblsnps,clk-csrphy-modephy-handlepinctrl-1mediatek,mac-wolsnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ussnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,rx-sched-spsnps,dcb-algorithmsnps,map-to-dma-channelsnps,tx-queues-to-usesnps,tx-sched-wrrsnps,prioritysnps,weightbus-widthcap-mmc-highspeedcap-mmc-hw-reseths400-ds-delaymax-frequencymmc-hs200-1_8vmmc-hs400-1_8vnon-removableno-sdno-sdiosupports-cqevmmc-supplyvqmmc-supplycap-sd-highspeedsd-uhs-sdr104sd-uhs-sdr50cd-gpioscap-sdio-irqkeep-power-in-suspendno-mmcpinctrl-2mmc-pwrseqclock-divreset-gpiosremote-endpointAVDD-supplyCPVDD-supplyDBVDD-supplyDCVDD-supplyMICVDD-supplyPLLVDD-supplySPKVDD1-supplySPKVDD2-supplygpio-cfgenable-gpiosdata-lanesirq-gpiosmaximum-speedmicrochip,led-modesusb-role-switchlabeldata-rolebus-rangelinux,pci-domaininterrupt-mapinterrupt-map-maskiommu-mapiommu-map-maskphy-names#phy-cellsmediatek,ibiasmediatek,ibias_upbitsoperating-points-v2power-domain-namesmali-supply#dma-cellsiommusmediatek,gce-client-regmediatek,gce-eventsmediatek,scpmediatek,larb-idmediatek,smimediatek,larbsmediatek,merge-mutemediatek,merge-fifo-enmax-linkrate-mhzbrightness-levelsdefault-brightness-levelnum-interpolated-stepspwmsstdout-pathbacklightpower-supplyno-mapvout-supplyenable-active-highpost-power-on-delay-ms